Datasheet

PIC18F97J94 FAMILY
DS30575A-page 200  2012 Microchip Technology Inc.
11.1.4 ANALOG AND DIGITAL PORTS
Many of the ports multiplex analog and digital function-
ality, providing a lot of flexibility for hardware designers.
PIC18F97J94 family devices can make any analog pin
analog or digital, depending on an application’s needs.
The ports’ analog/digital functionality is controlled by
the registers: ANCON1, ANCON2 and ANCON3.
Setting these registers makes the corresponding pins
analog and clearing the registers makes the ports
digital. For details on these registers, see Section 22.0
“12-Bit A/D Converter with Threshold Scan”
REGISTER 11-3: ODCON2: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 2
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CCP10OD CCP9OD CCP8OD CCP7OD CCP6OD CCP5OD CCP4OD ECCP3OD
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 CCP10OD: CCP10 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 6 CCP9OD: CCP9 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 5 CCP8OD: CCP8 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 4 CCP7OD: CCP7 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 3 CCP6OD: CCP6 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 2 CCP5OD: CCP5 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 1 CCP4OD: CCP4 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 0 ECCP3OD: ECCP3 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled