Datasheet

PIC18F97J94 FAMILY
DS30575A-page 194 2012 Microchip Technology Inc.
REGISTER 10-23: IOCP: INTERRUPT-ON-CHANGE POSITIVE EDGE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
IOCP7 IOCP6 IOCP5 IOCP4 IOCP3 IOCP2 IOCP1 IOCP0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 IOCP<7:0>: Interrupt-on-Change Positive Edge Enable bits
1 = Interrupt-on-change is enabled on the pin for a rising edge; associated status bit and interrupt flag
will be set upon detecting an edge
0 = Interrupt-on-change is disabled for the associated pin
REGISTER 10-24: IOCN: INTERRUPT-ON-CHANGE NEGATIVE EDGE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
IOCN7 IOCN6 IOCN5 IOCN4 IOCN3 IOCN2 IOCN1 IOCN0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 IOCN<7:0>: Interrupt-on-Change Negative Edge Enable bits
1 = Interrupt-on-change is enabled on the pin for a falling edge; associated status bit and interrupt flag
will be set upon detecting an edge
0 = Interrupt-on-change is disabled for the associated pin
REGISTER 10-25: IOCF: INTERRUPT-ON-CHANGE FLAG REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
IOCF7 IOCF6 IOCF5 IOCF4 IOCF3 IOCF2 IOCF1 IOCF0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 IOCF<7:0>: Interrupt-on-Change Flag bits
1 = An enabled change was detected on the associated pin; this is set when IOCP<x> = 1 and a positive
edge was detected on the input pin or when IOCN<x> = 1 and a negative edge was detected on the
input pin (clear in software to clear the IOCIF bit)
0 = No change was detected or the user cleared the detected change