Datasheet

PIC18F97J94 FAMILY
DS30575A-page 190  2012 Microchip Technology Inc.
REGISTER 10-20: IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
U-0 R/W-1 R/W-1 R/W-1 U-0 R/W-1 R/W-1 R/W-1
— ACTORSIP ACTLOCKIP TMR8IP — TMR6IP TMR5IP TMR4IP
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 Unimplemented: Read as ‘0’
bit 6 ACTORSIP: Active Clock Tuning Out-of-Range Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5 ACTLOCKIP: Active Clock Tuning Lock Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4 TMR8IP: TMR8 to PR8 Match Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3 Unimplemented: Read as ‘0’
bit 2 TMR6IP: TMR6 to PR6 Match Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1 TMR5IP: TMR5 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0 TMR4IP: TMR4 to PR4 Match Interrupt Priority bit
1 = High priority
0 = Low priority