Datasheet
2012 Microchip Technology Inc. DS30575A-page 19
PIC18F97J94 FAMILY
VLCAP1/RP8/CTED13/INT0/RB0
V
LCAP1
RP8
CTED13
INT0
RB0
73 58 48
I
I/O
I
I
I/O
Analog
ST/DIG
ST
ST
ST/DIG
LCD Drive Charge Pump Capacitor Input 1.
Remappable Peripheral Pin 8 input/output.
CTMU Edge 13 input.
External Interrupt 0.
General purpose I/O pin.
VLCAP2/RP9/RB1
V
LCAP2
RP9
RB1
72 57 47
I
I/O
I/O
Analog
ST/DIG
ST/DIG
LCD Drive Charge Pump Capacitor Input 2.
Remappable Peripheral Pin 9 input/output.
General purpose I/O pin.
SEG9/RP14/CTED1/RB2
SEG9
RP14
CTED1
RB2
70 56 46
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG9 output for LCD.
Remappable Peripheral Pin 14 input/output.
CTMU Edge 1 input.
General purpose I/O pin.
SEG10/RP7/CTED2/RB3
SEG10
RP7
CTED2
RB3
69 55 45
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG10 output for LCD.
Remappable Peripheral Pin 7 input/output.
CTMU Edge 2 input.
General purpose I/O pin.
SEG11/RP12/CTED3/RB4
SEG11
RP12
CTED3
RB4
68 54 44
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG11 output for LCD.
Remappable Peripheral Pin 12 input/output.
CTMU Edge 3 input.
General purpose I/O pin.
SEG8/RP13/CTED4/RB5
SEG8
RP13
CTED4
RB5
67 53 43
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG8 output for LCD.
Remappable Peripheral Pin 13 input/output.
CTMU Edge 4 input.
General purpose I/O pin.
PGC/CTED5/RB6
PGC
CTED5
RB6
65 52 42
I/O
I
I/O
ST/DIG
ST
ST/DIG
In-Circuit Debugger and ICSP™ programming clock pin.
CTMU Edge Input.
General purpose I/O pin.
PGD/CTED6/RB7
PGD
CTED6
RB7
58 47 37
I/O
I
I/O
ST/DIG
ST
ST/DIG
In-Circuit Debugger and ICSP™ programming data pin.
CTMU Edge 6 input.
General purpose I/O pin.
TABLE 1-4: PIC18F97J94 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
100 80 64
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
I2C = I
2
C™/SMBus