Datasheet
2012 Microchip Technology Inc. DS30575A-page 185
PIC18F97J94 FAMILY
REGISTER 10-15: PIE6: PERIPHERAL INTERRUPT ENABLE REGISTER 6
R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0
RC4IE TX4IE RC3IE TX3IE
— CMP3IE CMP2IE CMP1IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 RC4IE: EUSART4 Receive Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 6 TX4IE: EUSART4 Transmit Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 5 RC34IE: EUSART3 Receive Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 4 TX3IE: EUSART3 Transmit Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 3 Unimplemented: Read as ‘0’
bit 2 CMP3IE: Comparator 3 Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 1 CMP2IE: Comparator 2 Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 0 CMP1IE: Comparator 1 Interrupt Enable bit
1 = Enabled
0 =Disabled