Datasheet

 2012 Microchip Technology Inc. DS30575A-page 127
PIC18F97J94 FAMILY
F69h SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN
F68h SSP1MSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0
F67h BAUDCON1 ABDOVF RCIDL RXDTP TXCKP BRG16 IREN WUE ABDEN
F66h OSCCON2 CLKLOCK IOLOCK LOCK
— CF POSCEN SOSCGO —
F65h OSCCON3
— — — — — IRCF2 IRCF1 IRCF0
F64h OSCCON4 CPDIV1 CPDIV0 PLLEN
— — — — —
F63h ACTCON ACTEN
— ACTSIDL ACTSRC ACTLOCK ACTLOCKPOL ACTORS ACTORSPOL
F62h WPUB WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0
F61h PIE6 RC4IE TX4IE RC3IE TX3IE
— CMP3IE CMP2IE CMP1IE
F60h DMACON1 SSCON1 SSCON0 TXINC RXINC DUPLEX1 DUPLEX0 DLYINTEN DMAEN
F5Fh RTCCON1 RTCEN
— RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0
F5Eh RTCCAL CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0
F5Dh RTCVALH RTCC Value High Register Window Based on RTCPTR<1:0>
F5Ch RTCVALL RTCC Value Low Register Window Based on RTCPTR<1:0>
F5Bh ALRMCFG ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0
F5Ah ALRMRPT ARPT7 ARPT6 ARPT5 ARPT4 ARPT3 ARPT2 ARPT1 ARPT0
F59h ALRMVALH Alarm Value High Register Window Based on APTR<1:0>
F58h ALRMVALL Alarm Value Low Register Window Based on APTR<1:0>
F57h RTCCON2 PWCEN PWCPOL PWCCPRE PWCSPRE RTCCLKSEL1 RTCCLKSEL0 RTCSECSEL1 RTCSECSEL0
F56h IOCP IOCP7 IOCP6 IOCP5 IOCP4 IOCP3 IOCP2 IOCP1 IOCP0
F55h IOCN IOCN7 IOCN6 IOCN5 IOCN4 IOCN3 IOCN2 IOCN1 IOCN0
F54h PADCFG1 RDPU REPU RFPU RGPU
RHPU RJPU RKPU RLPU
F53h CM1CON CON COE CPOL EVPOL1 EVPOL0 CREF CCH1 CCH0
F52h ECCP2AS ECCP2ASE ECCP2AS2 ECCP2AS1 ECCP2AS0 PSS2AC1 PSS2AC0 PSS2BD1 PSS2BD0
F51h ECCP2DEL P2RSEN P2DC6 P2DC5 P2DC4 P2DC3 P2DC2 P2DC1 P2DC0
F50h CCPR2H Capture/Compare/PWM Register 1 High Byte
F4Fh CCPR2L Capture/Compare/PWM Register 1 Low Byte
F4Eh CCP2CON P2M1 P2M0 CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0
F4Dh ECCP3AS ECCP3ASE ECCP3AS2 ECCP3AS1 ECCP3AS0 PSS3AC1 PSS3AC0 PSS3BD1 PSS3BD0
F4Ch ECCP3DEL P3RSEN P3DC6 P3DC5 P3DC4 P3DC3 P3DC2 P3DC1 P3DC0
F4Bh CCPR3H Capture/Compare/PWM Register 1 High Byte
F4Ah CCPR3L Capture/Compare/PWM Register 1 Low Byte
F49H CCP3CON P3M1 P3M0 CCP3X CCP3Y CCP3M3 CCP3M2 CCP3M1 CCP3M0
F48h CCPR8H Capture/Compare/PWM Register 8 High Byte
F47h CCPR8L Capture/Compare/PWM Register 8 Low Byte
F46h CCP8CON
— — CCP8X CCP8Y CCP8M3 CCP8M2 CCP8M1 CCP8M0
F45h CCPR9H Capture/Compare/PWM Register 9 High Byte
F44h CCPR9L Capture/Compare/PWM Register 9 Low Byte
F43h CCP9CON
— — CCP9X CCP9Y CCP9M3 CCP9M2 CCP9M1 CCP9M0
F42h CCPR10H Capture/Compare/PWM Register 10 High Byte
F41h CCPR10L Capture/Compare/PWM Register 10 Low Byte
F40h CCP10CON
— — CCP10X CCP10Y CCP10M3 CCP10M2 CCP10M1 CCP10M0
F3Fh TMR6 Timer6 Register
F3Eh PR6 Timer6 Period Register
F3Dh T6CON
— T6OUTPS3 T6OUTPS2 T6OUTPS1 T6OUTPS0 TMR6ON T6CKPS1 T6CKPS0
F3Ch TMR8 Timer8 Register
F3Bh PR8 Timer8 Period Register
F3Ah T8CON
— T8OUTPS3 T8OUTPS2 T8OUTPS1 T8OUTPS0 TMR8ON T8CKPS1 T8CKPS0
F39H SSP2CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN
F38h CM2CON CON COE CPOL EVPOL1 EVPOL0 CREF CCH1 CCH0
F37h CM3CON CON COE CPOL EVPOL1 EVPOL0 CREF CCH1 CCH0
TABLE 6-2: REGISTER FILE SUMMARY (CONTINUED)
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Legend:
— = unimplemented, read as ‘ 0 ’.