Datasheet

PIC18F97J94 FAMILY
DS30575A-page 126  2012 Microchip Technology Inc.
F9Ch PSTR1CON CMPL1 CMPL0 — STRSYNC STRD STRC STRB STRA
F9Bh OSCTUNE
— — TUN5 TUN4 TUN3 TUN2 TUN1 TUN0
F9Ah TRISJ TRISJ7 TRISJ6 TRISJ5 TRISJ4 TRISJ3 TRISJ2 TRISJ1 TRISJ0
F99h TRISH TRISH7 TRISH6 TRISH5 TRISH4 TRISH3 TRISH2 TRISH1 TRISH0
F98h TRISG TRISG7 TRISG6
— TRISG4 TRISG3 TRISG2 TRISG1 TRISG0
F97h TRISF TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2
— —
F96h TRISE TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0
F95h TRISD TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0
F94h TRISC TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
F93h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
F92h TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
F91h LATJ LATJ7 LATJ6 LATJ5 LATJ4 LATJ3 LATJ2 LATJ1 LATJ0
F90h LATH LATH7 LATH6 LATH5 LATH4 LATH3 LATH2 LATH1 LATH0
F8Fh LATG LATG7 LATG6
— LATG4 LATG3 LATG2 LATG1 LATG0
F8Eh LATF LATF7 LATF6 LATF5 LATF4 LATF3 LATF2
— —
F8Dh LATE LATE7 LATE6 LATE5 LATE4 LATE3 LATE2 LATE1 LATE0
F8Ch LATD LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0
F8Bh LATC LATC7 LATC6 LATC5 LATC4 LATC3 LATC2 LATC1 LATC0
F8Ah LATB LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0
F89h LATA LATA7 LATA6 LATA5 LATA4 LATA3 LATA2 LATA1 LATA0
F88h PORTJ RJ7 RJ6 RJ5 RJ4 RJ3 RJ2 RJ1 RJ0
F87h PORTH RH7 RH6 RH5 RH4 RH3 RH2 RH1 RH0
F86h PORTG RG7 RG6
— RG4 RG3 RG2 RG1 RG0
F85h PORTF RF7 RF6 RF5 RF4 RF3 RF2
— —
F84h PORTE RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0
F83h PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0
F82h PORTC RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
F81h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
F80h PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
F7Fh EECON1
— — WWPROG FREE WRERR WREN WR —
F7Eh EECON2 EEPROM Control Register 2 (not a physical register)
F7Dh RCON2 EXTR
—SWDTEN — — — — —
F7Ch RCON3 STKERR
— — — VDDBOR VDDPOR VBPOR VBAT
F7Bh RCON4
— — —SRETEN —DPSLP—PMSLP
F7Ah UFRML FRM7 FRM6 FRM5 FRM4 FRM3 FRM2 FRM1 FRM0
F79h UFRMH
— — — — — FRM10 FRM9 FRM8
F78h UIR
— SOFIF STALLIF IDLEIF TRNIF ACTVIF UERRIF URSTIF
F77h UEIR BTSEF
— — BTOEF DFN8EF CRC16EF CRC5EF PIDEF
F76H USTAT
— ENDP3 ENDP2 ENDP1 ENDP0 DIR PPBI —
F75h UCON
— PPBRST SE0 PKTDIS USBEN RESUME SUSPND —
F74h UADDR
— ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0
F73h TRISVP TRISVP7 TRISVP6 TRISVP5 TRISVP4 TRISVP3 TRISVP2 TRISVP1 TRISVP0
F72h LATVP LATVP7 LATVP6 LATVP5 LATVP4 LATVP3 LATVP2 LATVP1 LATVP0
F71h PORTVP RVP7 RVP6 RVP5 RVP4 RVP3 RVP2 RVP1 RVP0
F70h TXADDRL SPI DMA Transmit Data Pointer Low Byte
F6Fh TXADDRH
— — — — SPI DMA Transmit Data Pointer High Byte
F6Eh RXADDRL SPI DMA Receive Data Pointer Low Byte
F6Dh RXADDRH
— — — — SPI DMA Receive Data Pointer High Byte
F6Ch DMABCL SPI DMA Byte Count Low Byte
F6Bh DMABCH
— — — — — — SPI DMA Byte Count High Byte
F6Ah TXBUF TXBUF7 TXBUF6 TXBUF5 TXBUF4 TXBUF3 TXBUF2 TXBUF1 TXBUF0
TABLE 6-2: REGISTER FILE SUMMARY (CONTINUED)
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Legend:
— = unimplemented, read as ‘ 0 ’.