User manual

Table Of Contents
General Purpose Input/Output Labs
© 2009 Microchip Technology Inc. DS41369A-page 29
3.3.6 Lab 3: Simple Delays Using Timer0
3.3.6.1 NEW REGISTERS USED IN THIS LAB
To configure the peripherals used in this lab, the following registers are used:
1. Timer0 Module Register: TMR0
- Holds a count value of the number of selected edge transition of a clock
source.
2. OPTION Register: OPTION_REG (Register 5-1 in Section 5 of the PIC16F690
Data Sheet).
- Selects clock source used to increment TMR0 result register.
- Selects clock source edge transition to increment TMR0.
3. Software configurable prescaler to determine the number of clock source edge
transitions before incrementing TMR0 register value.
4. Interrupt Control Register: INTCON (Register 2-3 in Section 2 of the PIC16F690
Data Sheet).
- Contains a flag that when 1, indicates a TMR0 register overflow has occurred.
3.3.6.2 OVERVIEW
To implement a more accurate delay, the Timer0 peripheral can be used. Timer0 is an
8-bit timer/counter that uses a clock source to increment an 8-bit register called TMR0.
Since this register is 8 bits, it can increment up 2
8
= 256 times or 0
10
- 255
10
(00000000
2
- 11111111
2
) inclusive then rollover or overflow back to ‘0’. Whenever
TMR0 overflows, a Timer0 Overflow Flag (T0IF) in the OPTION register is set to ‘1’.
This register also features a prescaler that determines how many clock source cycles
it takes to increment TMR0 by 1’. In this way, simply by tracking the T0IF, very accurate
delays can be implemented. In this lab, the TMR0 register is configured to increment
on the low-to-high transition of an available internal instruction clock on the PIC16F690.
This internal instruction clock runs at the rate of the internal oscillator frequency F
OSC
divided by 4. Therefore, when the PIC16F690 is configured to operate using the inter-
nal 4 MHz oscillator, this internal instruction clock runs at a rate of
F
OSC/4 = 4MHz/4 = 1MHz. This is a period of 1/1MHz = 1 μS. If it is known that TMR0
increments every 1 μS, and it takes 256 internal instruction clock cycles to cause a
TMR0 overflow (i.e., 0-255 inclusive), then Equation 3-1 can be derived:
EQUATION 3-1: TMR0 OVERFLOW PERIOD USING FOSC/4
As mentioned, Timer0 also features a prescaler that can be configured to increment the
value in TMR0 every 2, 4, 8, 16, 32, 64, 128, or 256 clock source transitions. Therefore,
this feature can be added to Equation 3-1 to create Equation 3-2.
EQUATION 3-2: TMR0 OVERFLOW PERIOD WHEN INCLUDING THE
PRESCALER
TMR0 Overflow Period = (4/FOSC) x 256 = 1 μSecond x 256 = 256 μSeconds
TMR0 Overflow Period = (4/FOSC) x 256 x prescaler
Using a 1:32 prescaler setting as an example and a 4 MHz internal oscillator
TMR0 Overflow Period = 1
μS x 256 x 32 = 8.192mS