User's Manual

© 2014 Microchip Technology Inc. Preliminary DS60001270C-page 19
CY920
3.0 APPLICATION GUIDELINES
This section describes the power-up sequence and the
RF guidelines recommended by Microchip.
3.1 Power Sequencing and Reset
Timing
The power sequencing during power on should start
with the highest voltage rail. The power sequencing
should progress from the higher voltage rail to the
lower voltage rail, i.e power-up 3.3V, 2.5V, 1.8V, and
then 1.2V with a delay of 2 ms between each power rail.
During power-down, the power sequencing should be
in the reverse direction, i.e., remove 1.2V, 1.8V, 2.5V,
and then 3.3V. The power-up sequence is mandatory
and the power-down sequence is preferred, but
optional. Figure 3-1 illustrates the power-up timing.
FIGURE 3-1: POWER-UP SEQUENCE
3.2 RF Considerations
The overall performance of the system, RF, and
Wi-Fi/BT is significantly affected by the product design,
environment and application. It is the responsibility of
the product designer to ensure system level shielding
(if required) and to verify the performance of the given
product features and applications.
The Wi-Fi/BT performance will be affected by the RF
environment surrounding the CY920 module. Consider
the following precautions for optimal Wi-Fi/BT
performance:
• The CY920 module is positioned in a noise-free
RF environment, i.e, away from high frequency
clock signals and any other sources of RF energy.
• The antenna is not shielded by any metal objects,
such as loudspeakers or any other metal parts.
• The power supplies are clean and noise-free.
Note: This data sheet summarizes the features
of the CY920 network media module. It is
not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
various application notes available on the
Microchip web site www.microchip.com.
3.3V
2.5V
1.8V
1.2V
Note: The CY920 module includes RF shielding
on the top and bottom of the board as a
standard feature.