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SMSC COM20020I Rev D Page 1 Revision 12-05-06

PRODUCT PREVIEW

COM20020I Rev D

5Mbps ARCNET (ANSI

878.1) Controller with

2K x 8 On-Chip RAM

Data Brief

Product Features

 New Features for Rev. D

− Data Rates up to 5 Mbps

− Programmable Reconfiguration Times

 28 Pin PLCC and 48 Pin TQFP Packages;

Lead-free RoHS Compliant Packages also

Available

 Ideal for Industrial/Factory/Building

Automation and Transportation Applications

 Deterministic, (ANSI 878.1), Token Passing

ARCNET Protocol

 Minimal Microcontroller and Media Interface

Logic Required

 Flexible Interface For Use With All

Microcontrollers or Microprocessors

 Automatically Detects Type of

Microcontroller Interface

 2Kx8 On-Chip Dual Port RAM

 Command Chaining for Packet Queuing

 Sequential Access to Internal RAM

 Software Programmable Node ID

 Eight, 256 Byte Pages Allow Four Pages TX

and RX Plus Scratch-Pad Memory

 Next ID Readable

 Internal Clock Scaler and Clock Multiplier for

Adjusting Network Speed

 Operating Temperature Range of -40

C to

+85

 Self-Reconfiguration Protocol

 Supports up to 255 Nodes

 Supports Various Network Topologies (Star,

Tree, Bus...)

 CMOS, Single +5V Supply

 Duplicate Node ID Detection

 Powerful Diagnostics

 Receive All Packets Mode

 Flexible Media Interface:

− Traditional Hybrid Interface for Long Distances

up to Four Miles at 2.5 Mbps

− RS485 Differential Driver Interface for Low

Cost, Low Power, High Reliability

ORDERING INFORMATION

Order Numbers:

COM20020I-LJP for 28 pin PLCC package

COM20020I-DZD for 28 pin PLCC lead-free RoHS compliant package

COM20020I-HD for 48 pin TQFP package

COM20020I-HT for 48 pin TQFP lead-free RoHS compliant package

Summary of content (6 pages)

PAGE 1
COM20020I Rev D 5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM Data Brief Product Features New Features for Rev.
PAGE 2
80 Arkay Drive Hauppauge, NY 11788 (631) 435-6000 FAX (631) 273-3123 Copyright © 2006 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies.
PAGE 3
General Description SMSC's COM20020ID is a member of the family of Embedded ARCNET Controllers from Standard Microsystems Corporation. The device is a general purpose communications controller for networking microcontrollers and intelligent peripherals in industrial, automotive, and embedded control environments using an ARCNET® protocol engine.
PAGE 4
Block Diagram A0/nMUX A1 A2/BALE ADDRESS DECODING CIRCUITRY 2K x 8 RAM ADDITIONAL REGISTERS AD0-AD2, D3-D7 nINTR nRESET STATUS/ COMMAND REGISTER RESET LOGIC TX/RX LOGIC MICROSEQUENCER AND WORKING REGISTERS OSCILLATOR nPULSE1 nPULSE2 nTXEN RXIN XTAL1 XTAL2 nRD/nDS nWR/DIR nCS BUS ARBITRATION CIRCUITRY RECONFIGURATION TIMER NODE ID LOGIC Figure 1 - COM20020ID Internal Block Diagram Revision 12-05-06 Page 4 PRODUCT PREVIEW SMSC COM20020I Rev D
PAGE 5
Package Outlines G PIN N O. 1 E J A F B B1 D3 D2 R J J D1 D C D IM A A1 B B1 C D D1 D2 D3 E F G J R Seating Plane Base Plane A1 28L .160-.180 .090-.120 .013-.021 .026-.032 .020-.045 .485-.495 .450-.456 .390-.430 .300 R EF .050 BSC .042-.056 .042-.048 .000-.020 .025-.045 N OTES: 1. A ll dim ensions are in inches. 2. C ircle indicating pin 1 can appear on a top surface as show n on the draw ing or right above it on a beveled edge.
PAGE 6
Figure 3 - 48 Pin TQFP Package Outline Table 1 - 48 Pin TQFP Package Parameters A A1 A2 D D/2 D1 E E/2 E1 H L L1 e θ W R1 R2 ccc ccc Note 1: MIN ~ 0.05 1.35 8.80 4.40 6.90 8.80 4.40 6.90 0.09 0.45 ~ 0o 0.17 0.08 0.08 ~ ~ NOMINAL ~ 0.10 1.40 9.00 4.50 7.00 9.00 4.50 7.00 ~ 0.60 1.00 0.50 Basic ~ ~ ~ ~ ~ ~ MAX 1.6 0.15 1.45 9.20 4.60 7.10 9.10 4.60 7.10 0.20 0.75 ~ 7o 0.27 ~ 0.20 0.0762 0.