Datasheet

44
XMEGA D4 [DATASHEET]
8135P–AVR–01/2014
Figure 25-1. ADC overview.
The ADC may be configured for 8- or 12-bit result, reducing the minimum conversion time (propagation delay) from 5.0µs
for 12-bit to 3.6µs for 8-bit result.
ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding. This eases calculation when
the result is represented as a signed integer (signed 16-bit number).
Notation of this peripheral is ADCA. The PORTA has ADCA inputs 0..7 and PORTB has ADCA inputs 8..11.
CH0 Result
Compare
Register
<
>
Threshold
(Int Req)
Internal 1.00V
Internal VCC/1.6V
AREFA
AREFB
V
INP
V
INN
Internal
signals
Internal VCC/2
ADC0
ADC11
•
•
•
ADC0
ADC7
•
•
•
Reference
Voltage