Datasheet

128
XMEGA D4 [DATASHEET]
8135P–AVR–01/2014
32.4.6 ADC characteristics
Table 32-93. Power supply, reference and input range.
Table 32-94. Clock and timing.
Symbol Parameter Condition Min. Typ. Max. Units
AV
CC
Analog supply voltage V
CC
- 0.3 V
CC
+ 0.3
V
V
REF
Reference voltage 1.0 AV
CC
- 0.6
R
in
Input resistance Switched 4.0 k
C
sample
Input capacitance Switched 4.4 pF
R
AREF
Reference input resistance (leakage only) >10 M
C
AREF
Reference input capacitance Static load 7.0 pF
V
IN
Input range -0.1 AV
CC
+0.1
VConversion range Differential mode, Vinp - Vinn -V
REF
V
REF
V
IN
Conversion range Single ended unsigned mode, Vinp -V V
REF
-V
ΔV Fixed offset voltage 190 LSB
Symbol Parameter Condition Min. Typ. Max. Units
Clk
ADC
ADC clock frequency
Maximum is 1/4 of Peripheral clock
frequency
100 1400
kHz
Measuring internal signals 100 125
f
ClkADC
Sample rate
14
200
ksps
f
ADC
Sample rate
Current limitation (CURRLIMIT) off 200
CURRLIMIT = LOW 150
CURRLIMIT = MEDIUM 100
CURRLIMIT = HIGH 50
Sampling time 1/2 Clk
ADC
cycle 0.25 5 µs
Conversion time (latency)
(RES+2)/2+GAIN
RES = 8 or 12, GAIN = 0, 1, 2 or 3
5 7 10
Clk
ADC
cycles
Start-up time ADC clock cycles 12 24
Clk
ADC
cycles
ADC settling time
After changing reference or input mode 7 7
After ADC flush 1 1