Datasheet

121
XMEGA D4 [DATASHEET]
8135P–AVR–01/2014
Notes: 1. Required only for f
SCL
> 100kHz.
2. C
b
= Capacitance of one bus line in pF.
3. f
PER
= Peripheral clock frequency.
t
HD;STA
Hold time (repeated) START condition
f
SCL
 100kHz 4.0
µs
f
SCL
> 100kHz 0.6
t
LOW
Low period of SCL clock
f
SCL
 100kHz 4.7
f
SCL
> 100kHz 1.3
t
HIGH
High period of SCL clock
f
SCL
 100kHz 4.0
f
SCL
> 100kHz 0.6
t
SU;STA
Set-up time for a repeated START
condition
f
SCL
 100kHz 4.7
f
SCL
> 100kHz 0.6
t
HD;DAT
Data hold time
f
SCL
 100kHz 0 3.45
µs
f
SCL
> 100kHz 0 0.9
t
SU;DAT
Data setup time
f
SCL
 100kHz 250
f
SCL
> 100kHz 100
t
SU;STO
Setup time for STOP condition
f
SCL
 100kHz 4.0
f
SCL
> 100kHz 0.6
t
BUF
Bus free time between a STOP and
START condition
f
SCL
 100kHz 4.7
f
SCL
> 100kHz 1.3
Symbol Parameter Condition Min. Typ. Max. Units