Datasheet

334
XMEGA B [DATASHEET]
8291B–AVR–01/2013
Figure 26-17.ADC timing for one single conversion with 64x gain.
26.10 ADC Input Model
The voltage input must charge the sample and hold (S/H) capacitor in the ADC in order to achieve maximum accuracy.
Seen externally, the ADC input consists of an input resistance (R
in
= R
channel
+ R
switch
) and the S/H capacitor (C
sample
).
Figure 26-18 on page 334 and Figure 26-19 on page 334 show the ADC input channel.
Figure 26-18.ADC input for single-ended measurements.
Figure 26-19.ADC input for differential measurements and differential measurements with gain.
In order to achieve n bits of accuracy, the source output resistance, R
source
, must be less than the ADC input resistance
on a pin:
where the ADC sample time, T
S
is one-half the ADC clock cycle given by:
For details on R
channel
, R
switch
, and C
sample
, refer to the ADC electrical characteristic in the device datasheet.
CONVERTING BIT
START
IF
ADC SAMPLE
AMPLIFY
msb 10
9 8 7
6
5 4 3 2 1 lsb
clk
ADC
12345678910
R
source
T
s
C
sample
2
n 1+
ln
-----------------------------------------------
R
channel
– R
switch
–
T
s
1
2 f
ADC
----------------------