Datasheet

302
XMEGA B [DATASHEET]
8291B–AVR–01/2013
24.7.5 CHECKSUM1 – Checksum register 1
 Bit 7:0 – CHECKSUM[15:8]: Checksum byte 1
These bits hold byte 1 of the generated CRC.
24.7.6 CHECKSUM2 – Checksum register 2
 Bit 7:0 – CHECKSUM[23:16]: Checksum byte 2
These bits hold byte 2 of the generated CRC when CRC-32 is used.
24.7.7 CHECKSUM3 – CRC Checksum register 3
 Bit 7:0 – CHECKSUM[31:24]: Checksum byte 3
These bits hold byte 3 of the generated CRC when CRC-32 is used.
24.8 Register Summary
Bit 76543210
+0x05 CHECKSUM[15:8]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x06 CHECKSUM[23:16]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x07 CHECKSUM[31:24]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
+0x00 CTRL RESET[1:0] CRC32 – SOURCE[3:0] 300
+0x01 STATUS
– – – – – – ZERO BUSY 301
+0x02 Reserved – – – – – – – –
+0x03 DATAIN DATAIN[7:0] 301
+0x04 CHECKSU CHECKSUM[7:0] 302
+0x05 CHECKSU CHECKSUM[15:8] 302
+0x06 CHECKSU CHECKSUM[23:16] 302
+0x07 CHECKSU CHECKSUM[31:24] 302