Datasheet

143
XMEGA B [DATASHEET]
8291B–AVR–01/2013
12.13 Register Descriptions – Port Configuration
12.13.1 MPCMASK – Multi-pin Configuration Mask register
 Bit 7:0 – MPCMASK[7:0]: Multi-pin Configuration Mask
The MPCMASK register enables configuration of several pins of a port at the same time. Writing a one to bit n makes pin
n part of the multi-pin configuration. When one or more bits in the MPCMASK register is set, writing any of the PINnCTRL
registers will update only the PINnCTRL registers matching the mask in the MPCMASK register for that port. The
MPCMASK register is automatically cleared after any PINnCTRL register is written.
12.13.2 VPCTRLA – Virtual Port-map Control register A
 Bit 7:4 – VP1MAP: Virtual Port 1 Mapping
These bits decide which ports should be mapped to Virtual Port 1. The registers DIR, OUT, IN, and INTFLAGS will be
mapped. Accessing the virtual port registers is equal to accessing the actual port registers. See Table 12-7 on page 144
for configuration.
 Bit 3:0 – VP0MAP: Virtual Port 0 Mapping
These bits decide which ports should be mapped to Virtual Port 0. The registers DIR, OUT, IN, and INTFLAGS will be
mapped. Accessing the virtual port registers is equal to accessing the actual port registers. See Table 12-7 on page 144
for configuration.
12.13.3 VPCTRLB – Virtual Port-map Control register B
 Bit 7:4 – VP3MAP: Virtual Port 3 Mapping
These bits decide which ports should be mapped to Virtual Port 3. The registers DIR, OUT, IN, and INTFLAGS will be
mapped. Accessing the virtual port registers is equal to accessing the actual port registers. See Table 12-7 on page 144
for configuration.
Bit 76543210
+0x00 MPCMASK[7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x02 VP1MAP[3:0] VP0MAP[3:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 000000
Bit 76543210
+0x03 VP3MAP[3:0] VP2MAP[3:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0