Datasheet

12
XMEGA B [DATASHEET]
8291B–AVR–01/2013
The lowest register address holds the least-significant byte (LSB), and the highest register address holds the most-
significant byte (MSB). In the different addressing modes, these address registers function as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
3.10 RAMP and Extended Indirect Registers
In order to access program memory or data memory above 64KB, the address pointer must be larger than 16 bits. This is
done by concatenating one register to one of the X-, Y-, or Z-registers. This register then holds the most-significant byte
(MSB) in a 24-bit address or address pointer.
These registers are available only on devices with external bus interface and/or more than 64KB of program or data
memory space. For these devices, only the number of bits required to address the whole program and data memory
space in the device is implemented in the registers.
3.10.1 RAMPX, RAMPY and RAMPZ Registers
The RAMPX, RAMPY and RAMPZ registers are concatenated with the X-, Y-, and Z-registers, respectively, to enable
indirect addressing of the whole data memory space above 64KB and up to 16MB.
Figure 3-6. The combined RAMPX + X, RAMPY + Y and RAMPZ + Z registers.
When reading (ELPM) and writing (SPM) program memory locations above the first 128KB of the program memory,
RAMPZ is concatenated with the Z-register to form the 24-bit address. LPM is not affected by the RAMPZ setting.
3.10.2 RAMPD Register
This register is concatenated with the operand to enable direct addressing of the whole data memory space above 64KB.
Together, RAMPD and the operand will form a 24-bit address.
Figure 3-7. The combined RAMPD + K register.
Bit (Individually) 7 0 7 0 7 0
RAMPX XH XL
Bit (X-pointer) 23 16 15 8 7 0
Bit (Individually) 7 0 7 0 7 0
RAMPY YH YL
Bit (Y-pointer) 23 16 15 8 7 0
Bit (Individually) 7 0 7
0
70
RAMPZ ZH ZL
Bit (Z-pointer) 23 16 15 8 7 0
Bit (Individually) 7 0 15 0
RAMPD K
Bit (D-pointer) 23 16 15 0