Datasheet

94
XMEGA A1U [DATASHEET]
Atmel-8385H-AVR-ATxmega64A1U-128A1U-Datasheet–AVR–04/2014
Table 37-32. EBI SDRAM characteristics and requirements.
37.1.17 Two-Wire Interface Characteristics
Table 37-33 on page 95 describes the requirements for devices connected to the Two-Wire Interface Bus. The Atmel
AVR XMEGA Two-Wire Interface meets or exceeds these requirements under the noted conditions. Timing symbols
refer to Figure 37-7.
Figure 37-7. Two-Wire Interface bus timing.
Symbol Parameter Condition Min. Typ. Max. Units
t
ClkPER2
SDRAM clock period 0.5*t
ClkPER
ns
t
AH
SDRAM address hold time 0.5*t
ClkPER2
t
AS
SDRAM address setup time 0.5*t
ClkPER2
t
CH
SDRAM clock high-level width 0.5*t
ClkPER2
t
CL
SDRAM clock low-level width 0.5*t
ClkPER2
t
CKH
SDRAM CKE hold time 0.5*t
ClkPER2
t
CKS
SDRAM CKE setup time 0.5*t
ClkPER2
t
CMH
SDRAM CS, RAS, CAS, WE, DQM hold time 0.5*t
ClkPER2
t
CMS
SDRAM CS, RAS, CAS, WE, DQM setup time 0.5*t
ClkPER2
t
DRH
SDRAM data in hold after CLK high 0
t
AC
SDRAM access time from CLK t
ClkPER
-5
t
DWH
SDRAM data out hold after CLK high 0.5*t
ClkPER2
t
DWS
SDRAM data out setup before CLK high 0.5*t
ClkPER2
t
HD;STA
t
of
SDA
SCL
t
LOW
t
HIGH
t
SU;STA
t
BUF
t
r
t
HD;DAT
t
SU;DAT
t
SU;STO