Datasheet

205
XMEGA A1U [DATASHEET]
Atmel-8385H-AVR-ATxmega64A1U-128A1U-Datasheet–AVR–04/2014
Problem fix/Workaround
Configure PWM and CWCM according to the Table 39-1 on page 201.
Table 39-2. PWM and CWCM configuration.
5. AWEX PWM output after fault restarted with wrong values
When recovering from fault state, the PWM output will drive wrong values to the port for up to two CLK
PER
+
one CLK
PER4
cycles.
Problem fix/Workaround
The following seqence can be used in Latched Mode:
a. Disable DTI outputs (Write DTICCxEN to 0)
b. Clear fault flag
c. Wait for Overflow
d. Re-enable DTI (Write DTICCxEN to 1)
e. Set pin direction to Output
This will remove the glitch, but the following period will be shorter. In Cycle-by-cycle mode the same procedure
can be followed as long as the Pattern Generation Mode is not enabled.
For Pattern generation mode, there is no workaround.
6. RTC Counter value not correctly read after sleep
If a real time counter (RTC) interrupt is used wake up the device from sleep, and bit 0 of RTC count register
(CNT) has the same value as when the device entered sleep, CNT will not be read correctly during the first
prescaled RTC clock cycle after wakeup. The value read will be the same as the value in the register was
when entering sleep.
Problem fix/Workaround
Wait at least one prescaled RTC clock cycle before reading CNT.
7. RTC clock output option is non-functional
The real time counter (RTC) as clock output option is non-functional, and setting the RTCOUT bit in the clock
and event out register (CLKEVOUT) will have no effect.
Problem fix/Workaround
None
8. USB, when receiving 1023Byte length isochronous frame, it will corrupt 1024
th
SRAM location
When USB is configured for isochronous operation and 1023Byte data payload size, the 1024
th
RAM location
that is directly after the endpoint RAM buffer will be corrupted.
PGM CWCM Description
0 0 PGM and CWCM disabled
0 1 PGM enabled
1 0 PGM and CWCM enabled
1 1 PGM enabled