Datasheet

200
XMEGA A1U [DATASHEET]
Atmel-8385H-AVR-ATxmega64A1U-128A1U-Datasheet–AVR–04/2014
39. Errata
39.1 ATxmega64A1U
39.1.1 Rev. L
 Register ANAINIT in MCUR will always read as zero
 Enabling DFLL with illegal reference oscillator will lock the DFLL
 XOSCPWR configuration is non-functional
 Configuration of PGM and CWCM is not as described in XMEGA AU Manual
 AWEX PWM output after fault restarted with wrong values
 RTC Counter value not correctly read after sleep
 RTC clock output option is non-functional
 USB, when receiving 1023 byte length isochronous frame, it will corrupt 1024th SRAM location
 USB endpoint table is 16-byte alignment
 USB Auto ZLP feature is non-functional
 Disabling the USART transmitter does not automatically set the TxD pin direction to input
 TWI, SDAHOLD configuration in the TWI CTRL register is one bit
 ADC has increased INL error in when used in SE unsigned mode at low temperatures
 ADC is non-functional in SE unsigned mode with VREF below 1.8V
 ADC has increased linearity error when using the gain stage above 500ksps
 DAC Offset calibration range too small when using AVCC as reference
 DAC clock noise
 Internal 1V reference has noise at low temperature
1 Register ANAINIT in MCUR will always read as zero
The ANAINIT register in the MCUR module will always be read as zero even if written to a value. The actual
content of the register is correct.
Problem fix/Workaround
Do not use software that reads these registers to get the Analog Initialization configuration.
2. Enabling DFLL with illegal reference oscillator will lock the clock system
If external crystal is selected as reference for DFLL, but no crystal is connected and DFLL is enabled, the DFLL
will be locked until reset is issued.
Problem fix/Workaround
Do not enable DFLL before reference clock is present, enabled and ready.
3. XOSCPWR configuration is non-functional
The Crystal oscillator drive (XOSCPWR) option in the XOSC Control register is non-functional.
Problem fix/Workaround
None.