Datasheet

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[Not recommended for new designs - Use XMEGA A1U series] XMEGA A1 [DATASHEET]
8067O–AVR–06/2013
31. Peripheral Module Address Map
The address maps show the base address for each peripheral and module in XMEGA A1. For complete register
description and summary for each peripheral module, refer to the XMEGA A Manual.
Table 31-1. Peripheral Module Address Map
Base Address Name Description
0x0000 GPIO General Purpose IO Registers
0x0010 VPORT0 Virtual Port 0
0x0014 VPORT1 Virtual Port 1
0x0018 VPORT2 Virtual Port 2
0x001C VPORT3 Virtual Port 3
0x0030 CPU CPU
0x0040 CLK Clock Control
0x0048 SLEEP Sleep Controller
0x0050 OSC Oscillator Control
0x0060 DFLLRC32M DFLL for the 32 MHz Internal RC Oscillator
0x0068 DFLLRC2M DFLL for the 2 MHz RC Oscillator
0x0070 PR Power Reduction
0x0078 RST Reset Controller
0x0080 WDT Watch-Dog Timer
0x0090 MCU MCU Control
0x00A0 PMIC Programmable Multilevel Interrupt Controller
0x00B0 PORTCFG Port Configuration
0x00C0 AES AES Module
0x0100 DMA DMA Controller
0x0180 EVSYS Event System
0x01C0 NVM Non Volatile Memory (NVM) Controller
0x0200 ADCA Analog to Digital Converter on port A
0x0240 ADCB Analog to Digital Converter on port B
0x0300 DACA Digital to Analog Converter on port A
0x0320 DACB Digital to Analog Converter on port B
0x0380 ACA Analog Comparator pair on port A
0x0390 ACB Analog Comparator pair on port B
0x0400 RTC Real Time Counter
0x0440 EBI External Bus Interface
0x0480 TWIC Two Wire Interface on port C
0x0490 TWID Two Wire Interface on port D