Datasheet

47
[Not recommended for new designs - Use XMEGA A1U series] XMEGA A1 [DATASHEET]
8067O–AVR–06/2013
25. EBI – External Bus Interface
25.1 Features
 Supports SRAM up to:
 512KB using 3-port EBI configuration
 16MB using 3-port EBI configuration
 Supports SDRAM up to:
 128Mb using 3-port EBI configuration
 Four software configurable chip selects
 Software configurable wait state insertion
 Can run from the 2x peripheral clock frequency for fast access
25.2 Overview
The External Bus Interface (EBI) is used to connect external peripherals and memory for access through the data
memory space. When the EBI is enabled, data address space outside the internal SRAM becomes available using
dedicated EBI pins.
The EBI can interface external SRAM, SDRAM, and peripherals, such as LCD displays and other memory mapped
devices.
The address space for the external memory is selectable from 256 bytes (8-bit) up to 16MB (24-bit). Various multiplexing
modes for address and data lines can be selected for optimal use of pins when more or fewer pins are available for the
EBI. The complete memory will be mapped into one linear data address space continuing from the end of the internal
SRAM.
The EBI has four chip selects, each with separate configuration. Each can be configured for SRAM, SRAM low pin count
(LPC), or SDRAM.
The EBI is clocked from the fast, 2x peripheral clock, running up to two times faster than the CPU.
Four-bit and eight-bit SDRAM are supported, and SDRAM configurations, such as CAS latency and refresh rate, are
configurable in software.