Datasheet

102
[Not recommended for new designs - Use XMEGA A1U series] XMEGA A1 [DATASHEET]
8067O–AVR–06/2013
Any full asynchronous pin-change Interrupt from pin 2, on any port, that is pending when the sleep instruction is
executed, will be ignored until the device is woken from another source or the source triggers again. This applies
when entering all sleep modes where the System Clock is stopped.
Problem fix/Workaround
None.
24. Pin configuration does not affect Analog Comparator Output
The Output/Pull and inverted pin configuration does not affect the Analog Comparator output function.
Problem fix/Workaround
None for Output/Pull configuration.
For inverted I/O, configure the Analog Comparator to give an inverted result (i.e. connect positive input to the neg-
ative AC input and vice versa), or use and external inverter to change polarity of Analog Comparator output.
25. Low level interrupt triggered when pin input is disabled
If a pin input is disabled, but pin is configured to trigger on low level, interrupt request will be sent.
Problem fix/Workaround
Ensure that Interrupt mask for the disabled pin is cleared.
26. JTAG enable does not override Analog Comparator B output
When JTAG is enabled this will not override the Analog Comparator B (ACB) output, AC0OUT on pin 7 if this is
enabled.
Problem fix/Workaround
Use Analog Comparator output for ACA when JTAG is used, or use the PDI as debug interface.
27. NMI Flag for Crystal Oscillator Failure automatically cleared
NMI flag for Crystal Oscillator Failure (XOSCFDIF) will be automatically cleared when executing the NMI interrupt
handler.
Problem fix/Workaround
This device revision has only one NMI interrupt source, so checking the interrupt source in software is not
required.
28. Flash Power Reduction Mode can not be enabled when entering sleep
If Flash Power Reduction Mode is enabled when entering Power-save or Extended Standby sleep mode, the
device will only wake up on every fourth wake-up request. If Flash Power Reduction Mode is enabled when enter-
ing Idle sleep mode, the wake-up time will vary with up to 16 CPU clock cycles.