Datasheet

46
XMEGA C4 [DATASHEET]
8493G–AVR–01/2014
Figure 26-1. ADC overview.
The ADC may be configured for 8- or 12-bit result, reducing the minimum conversion time (propagation delay) from
3.35µs for 12-bit to 2.3µs for 8-bit result.
ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding. This eases calculation when
the result is represented as a signed integer (signed 16-bit number).
PORTA has one ADC. Notation of this peripheral is ADCA.
CH0 Result
Compare
Register
<
>
Threshold
(Int Req)
Internal 1.00V
Internal VCC/1.6V
AREFA
AREFB
V
INP
V
INN
Internal
signals
Internal VCC/2
ADC0
ADC11
•
•
•
ADC0
ADC7
•
•
•
Reference
Voltage
ADC