Datasheet
Table Of Contents
- Features
- 1. Ordering Information
- 2. Pinout/Block Diagram
- 3. Overview
- 4. Resources
- 5. Capacitive touch sensing
- 6. AVR CPU
- 7. Memories
- 8. Event System
- 9. System Clock and Clock options
- 9.1 Features
- 9.2 Overview
- 9.3 Clock Sources
- 9.3.1 32kHz Ultra Low Power Internal Oscillator
- 9.3.2 32.768kHz Calibrated Internal Oscillator
- 9.3.3 32.768kHz Crystal Oscillator
- 9.3.4 0.4 - 16MHz Crystal Oscillator
- 9.3.5 2MHz Run-time Calibrated Internal Oscillator
- 9.3.6 32MHz Run-time Calibrated Internal Oscillator
- 9.3.7 External Clock Sources
- 9.3.8 PLL with 1x-31x Multiplication Factor
- 10. Power Management and Sleep Modes
- 11. System Control and Reset
- 12. WDT – Watchdog Timer
- 13. Interrupts and Programmable Multilevel Interrupt Controller
- 14. I/O Ports
- 15. TC0/1 – 16-bit Timer/Counter Type 0 and 1
- 16. TC2 – Timer/Counter Type 2
- 17. AWeX – Advanced Waveform Extension
- 18. Hi-Res – High Resolution Extension
- 19. RTC – 16-bit Real-Time Counter
- 20. USB – Universal Serial Bus Interface
- 21. TWI – Two-Wire Interface
- 22. SPI – Serial Peripheral Interface
- 23. USART
- 24. IRCOM – IR Communication Module
- 25. CRC – Cyclic Redundancy Check Generator
- 26. ADC – 12-bit Analog to Digital Converter
- 27. AC – Analog Comparator
- 28. Programming and Debugging
- 29. Pinout and Pin Functions
- 30. Peripheral Module Address Map
- 31. Instruction Set Summary
- 32. Packaging information
- 33. Electrical Characteristics TBD
- 34. Typical Characteristics TBD
- 35. Errata
- 36. Datasheet Revision History
- Table of Contents
23
8493A–AVR–02/12
XMEGA C4
11. System Control and Reset
11.1 Features
• Reset the microcontroller and set it to initial state when a reset source goes active
• Multiple reset sources that cover different situations
–Power-on reset
– External reset
– Watchdog reset
– Brownout reset
– PDI reset
– Software reset
• Asynchronous operation
– No running system clock in the device is required for reset
• Reset status register for reading the reset source from the application code
11.2 Overview
The reset system issues a microcontroller reset and sets the device to its initial state. This is for
situations where operation should not start or continue, such as when the microcontroller oper-
ates below its power supply rating. If a reset source goes active, the device enters and is kept in
reset until all reset sources have released their reset. The I/O pins are immediately tri-stated.
The program counter is set to the reset vector location, and all I/O registers are set to their initial
values. The SRAM content is kept. However, if the device accesses the SRAM when a reset
occurs, the content of the accessed location can not be guaranteed.
After reset is released from all reset sources, the default oscillator is started and calibrated
before the device starts running from the reset vector address. By default, this is the lowest pro-
gram memory address, 0, but it is possible to move the reset vector to the lowest address in the
boot section.
The reset functionality is asynchronous, and so no running system clock is required to reset the
device. The software reset feature makes it possible to issue a controlled system reset from the
user software.
The reset status register has individual status flags for each reset source. It is cleared at power-
on reset, and shows which sources have issued a reset since the last power-on.
11.3 Reset Sequence
A reset request from any reset source will immediately reset the device and keep it in reset as
long as the request is active. When all reset requests are released, the device will go through
three stages before the device starts running again:
•Reset counter delay
•Oscillator startup
•Oscillator calibration
If another reset requests occurs during this process, the reset sequence will start over again.