8/16-bit Atmel XMEGA Microcontroller ATxmega256C3, ATxmega192C3, ATxmega128C3, ATxmega64C3, ATxmega32C3 Features High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit Microcontroller Nonvolatile program and data memories 32K - 256KBytes of In-System Self-Programmable Flash 4K - 8KBytes Boot Code Section with Independent Lock Bits 2K - 4KBytes EEPROM 4K - 16KBytes Internal SRAM Peripheral features Four-channel event system Five 16-bit timer/counters Four timer/count
1.
2. Pinout/Block Diagram Figure 2-1. Block diagram and pinout.
3. Overview The Atmel AVR XMEGA is a family of low power, high performance, and peripheral rich 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the AVR XMEGA devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed. The AVR CPU combines a rich instruction set with 32 general purpose working registers.
3.1 Block Diagram Figure 3-1. XMEGA C3 block diagram. PR[0..1] Programming, debug, test Power Ground External clock /Crystal pins General Purpose I /O Digital function Analog function /Oscillators XTAL1 XTAL2 Oscillator Circuits/ Clock Generation PORT R (2) Real Time Counter Watchdog Oscillator DATA BUS Watchdog Timer ACA Event System Controller PA[0..
4. Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 4.1 Recommended reading Atmel AVR XMEGA C manual XMEGA application notes This device data sheet only contains part specific information with a short description of each peripheral and module. The XMEGA C manual describes the modules and peripherals in depth.
6. AVR CPU 6.1 Features 8/16-bit, high-performance Atmel AVR RISC CPU 142 instructions Hardware multiplier 32x8-bit registers directly connected to the ALU Stack in RAM Stack pointer accessible in I/O memory space Direct addressing of up to 16MB of program memory and 16MB of data memory True 16/24-bit access to 16/24-bit I/O registers Efficient support for 8-, 16-, and 32-bit arithmetic Configuration change protection of system-critical features 6.
The arithmetic logic unit (ALU) supports arithmetic and logic operations between registers or between a constant and a register. Single-register operations can also be executed in the ALU. After an arithmetic operation, the status register is updated to reflect information about the result of the operation. The ALU is directly connected to the fast-access register file.
6.5 Program Flow After reset, the CPU starts to execute instructions from the lowest address in the flash programmemory ‘0.’ The program counter (PC) addresses the next instruction to be fetched. Program flow is provided by conditional and unconditional jump and call instructions capable of addressing the whole address space directly. Most AVR instructions use a 16-bit word format, while a limited number use a 32-bit format.
Six of the 32 registers can be used as three 16-bit address register pointers for data space addressing, enabling efficient address calculations. One of these address pointers can also be used as an address pointer for lookup tables in flash program memory. 7. Memories 7.
7.3 Flash Program Memory The Atmel AVR XMEGA devices contain on-chip, in-system reprogrammable flash memory for program storage. The flash memory can be accessed for read and write from an external programmer through the PDI or from application software running in the device. All AVR CPU instructions are 16 or 32 bits wide, and each flash location is 16 bits wide. The flash memory is organized in two main sections, the application section and the boot loader section.
7.3.4 Production Signature Row The production signature row is a separate memory section for factory programmed data. It contains calibration data for functions such as oscillators and analog modules. Some of the calibration values will be automatically loaded to the corresponding module or peripheral unit during reset. Other values must be loaded from the signature row and written to the corresponding peripheral registers from software.
Figure 7-2. Data memory map (hexadecimal address).
7.8 Memory Timing Read and write access to the I/O memory takes one CPU clock cycle. A write to SRAM takes one cycle, and a read from SRAM takes two cycles. EEPROM page load (write) takes one cycle, and three cycles are required for read. For burst read, new data are available every second cycle. Refer to the instruction summary for more details on instructions and instruction timing. 7.9 Device ID and Revision Each device has a three-byte device ID.
Table 7-3. Devices Number of bytes and pages in the EEPROM.
8. Event System 8.
9. System Clock and Clock options 9.1 Features Fast start-up time Safe run-time clock switching Internal oscillators: 32MHz run-time calibrated and tuneable oscillator 2MHz run-time calibrated oscillator 32.768kHz calibrated oscillator 32kHz ultra low power (ULP) oscillator with 1kHz output External clock options 0.4MHz - 16MHz crystal oscillator 32.
Figure 9-1. The clock system, clock sources and clock distribution. Real Time Counter Peripherals RAM AVR CPU Non-Volatile Memory clkPER clkPER2 clkCPU clkPER4 USB clkUSB System Clock Prescalers Brown-out Detector Prescaler Watchdog Timer clkSYS clkRTC System Clock Multiplexer (SCLKSEL) RTCSRC USBSRC DIV32 DIV32 DIV32 PLL PLLSRC DIV4 XOSCSEL 32kHz Int. ULP 32.768kHz Int. OSC 32.768kHz TOSC 32MHz Int. Osc 2MHz Int. Osc XTAL2 XTAL1 TOSC2 TOSC1 9.3 0.
1kHz output. The oscillator is automatically enabled/disabled when it is used as clock source for any part of the device. This oscillator can be selected as the clock source for the RTC. 9.3.2 32.768kHz Calibrated Internal Oscillator This oscillator provides an approximate 32.768kHz clock. It is calibrated during production to provide a default frequency close to its nominal frequency. The calibration register can also be written from software for run-time calibration of the oscillator frequency.
10. Power Management and Sleep Modes 10.1 Features Power management for adjusting power consumption and functions Five sleep modes Idle Power down Power save Standby Extended standby Power reduction register to disable clock and turn off unused peripherals in active and idle modes 10.2 Overview Various sleep modes and clock gating are provided in order to tailor power consumption to application requirements.
10.3.3 Power-save Mode Power-save mode is identical to power down, with one exception. If the real-time counter (RTC) is enabled, it will keep running during sleep, and the device can also wake up from either an RTC overflow or compare match interrupt. 10.3.4 Standby Mode Standby mode is identical to power down, with the exception that the enabled system clock sources are kept running while the CPU, peripheral, and RTC clocks are stopped. This reduces the wake-up time. 10.3.
11. System Control and Reset 11.1 Features Reset the microcontroller and set it to initial state when a reset source goes active Multiple reset sources that cover different situations Power-on reset External reset Watchdog reset Brownout reset PDI reset Software reset Asynchronous operation No running system clock in the device is required for reset Reset status register for reading the reset source from the application code 11.
11.4.2 Brownout Detection The on-chip brownout detection (BOD) circuit monitors the VCC level during operation by comparing it to a fixed, programmable level that is selected by the BODLEVEL fuses. If disabled, BOD is forced on at the lowest level during chip erase and when the PDI is enabled. 11.4.3 External Reset The external reset circuit is connected to the external RESET pin.
12. WDT – Watchdog Timer 12.1 Features Issues a device reset if the timer is not reset before its timeout period Asynchronous operation from dedicated oscillator 1kHz output of the 32kHz ultra low power oscillator 11 selectable timeout periods, from 8ms to 8s Two operation modes: Normal mode Window mode Configuration lock to prevent unwanted changes 12.2 Overview The watchdog timer (WDT) is a system function for monitoring correct program operation.
13. Interrupts and Programmable Multilevel Interrupt Controller 13.
Table 13-1. Reset and interrupt vectors.
14. I/O Ports 14.
14.3 Output Driver All port pins (Pn) have programmable output configuration. 14.3.1 Push-pull Figure 14-1. I/O configuration - Totem-pole. DIRn OUTn Pn INn 14.3.2 Pull-down Figure 14-2. I/O configuration - Totem-pole with pull-down (on input). DIRn OUTn Pn INn 14.3.3 Pull-up Figure 14-3. I/O configuration - Totem-pole with pull-up (on input).
14.3.4 Bus-keeper The bus-keeper’s weak output produces the same logical level as the last output level. It acts as a pull-up if the last level was ‘1’, and pull-down if the last level was ‘0’. Figure 14-4. I/O configuration - Totem-pole with bus-keeper. DIRn OUTn Pn INn 14.3.5 Others Figure 14-5. Output configuration - Wired-OR with optional pull-down. OUTn Pn INn Figure 14-6. I/O configuration - Wired-AND with optional pull-up.
14.4 Input sensing Input sensing is synchronous or asynchronous depending on the enabled clock for the ports, and the configuration is shown in Figure 14-7. Figure 14-7. Input sensing system overview. Asynchronous sensing EDGE DETECT Interrupt Control IRQ Synchronous sensing Pxn Synchronizer INn D Q D R Q EDGE DETECT Synchronous Events R INVERTED I/O Asynchronous Events When a pin is configured with inverted I/O, the pin value is inverted before the input sensing. 14.
15. TC0/1 – 16-bit Timer/Counter Type 0 and 1 15.
Only Timer/Counter 0 has the split mode feature that split it into two 8-bit Timer/Counters with four compare channels each. Some timer/counters have extensions to enable more specialized waveform and frequency generation. The advanced waveform extension (AWeX) is intended for motor control and other power control applications. It enables low- and highside output with dead-time insertion, as well as fault protection for disabling and shutting down external drivers.
16. TC2 – Timer/Counter Type 2 16.
17. AWeX – Advanced Waveform Extension 17.
18. Hi-Res – High Resolution Extension 18.1 Features Increases waveform generator resolution up to 8x (three bits) Supports frequency, single-slope PWM, and dual-slope PWM generation Supports the AWeX when this is used for the same timer/counter 18.2 Overview The high-resolution (hi-res) extension can be used to increase the resolution of the waveform generation output from a timer/counter by four or eight.
19. RTC – 16-bit Real-Time Counter 19.1 Features 16-bit resolution Selectable clock source 32.768kHz external crystal External clock 32.768kHz internal oscillator 32kHz internal ULP oscillator Programmable 10-bit clock prescaling One compare register One period register Clear counter on period overflow Optional interrupt/event on overflow and compare match 19.
20. USB – Universal Serial Bus Interface 20.1 Features One USB 2.0 full speed (12Mbps) and low speed (1.
Multipacket transfer enables a data payload exceeding the maximum packet size of an endpoint to be transferred as multiple packets without software intervention. This reduces the CPU intervention and the interrupts needed for USB transfers. For low-power operation, the USB module can put the microcontroller into any sleep mode when the USB bus is idle and a suspend condition is given. Upon bus resumes, the USB module can wake up the microcontroller from any sleep mode. PORTD has one USB.
21. TWI – Two-Wire Interface 21.
22. SPI – Serial Peripheral Interface 22.1 Features Two Identical SPI peripherals Full-duplex, three-wire synchronous data transfer Master or slave operation Lsb first or msb first data transfer Eight programmable bit rates Interrupt flag at the end of transmission Write collision flag to indicate data collision Wake up from idle sleep mode Double speed master mode 22.
23. USART 23.
24. IRCOM – IR Communication Module 24.1 Features Pulse modulation/demodulation for infrared communication IrDA compatible for baud rates up to 115.2Kbps Selectable pulse modulation scheme 3/16 of the baud rate period Fixed pulse period, 8-bit programmable Pulse modulation disabled Built-in filtering Can be connected to and used by any USART 24.2 Overview Atmel AVR XMEGA devices contain an infrared communication module (IRCOM) that is IrDA compatible for baud rates up to 115.2Kbps.
25. CRC – Cyclic Redundancy Check Generator 25.1 Features Cyclic redundancy check (CRC) generation and checking for Communication data Program or data in flash memory Data in SRAM and I/O memory space Integrated with flash memory and CPU Automatic CRC of the complete or a selectable range of the flash memory CPU can load data to the CRC generator through the I/O interface CRC polynomial software selectable to CRC-16 (CRC-CCITT) CRC-32 (IEEE 802.3) Zero remainder detection 25.
26. ADC – 12-bit Analog to Digital Converter 26.1 Features One Analog to Digital Converter (ADC) 12-bit resolution Up to 300 thousand samples per second Down to 2.3µs conversion time with 8-bit resolution Down to 3.
Figure 26-1. ADC overview. ADC0 • • • ADC15 Compare Register ADC Internal signals ADC0 • • • ADC7 < > VINP Threshold (Int Req) CH0 Result VINN Internal 1.00V Internal VCC/1.6V Internal VCC/2 AREFA AREFB Reference Voltage The ADC may be configured for 8- or 12-bit result, reducing the minimum conversion time (propagation delay) from 3.35µs for 12-bit to 2.3µs for 8-bit result. ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding.
27. AC – Analog Comparator 27.
Figure 27-1. Analog comparator overview. Pin Input + AC0OUT Pin Input Hysteresis Enable Voltage Scaler ACnCTRL ACnMUXCTRL Interrupt Mode WINCTRL Enable Bandgap Interrupt Sensititivity Control & Window Function Interrupts Events Hysteresis + Pin Input AC1OUT Pin Input The window function is realized by connecting the external inputs of the two analog comparators in a pair as shown in Figure 27-2. Figure 27-2. Analog comparator window function.
28. Programming and Debugging 28.
29. Pinout and Pin Functions The device pinout is shown in “Pinout/Block Diagram” on page 3. In addition to general purpose I/O functionality, each pin can have several alternate functions. This will depend on which peripheral is enabled and connected to the actual pin. Only one of the pin functions can be used at time. 29.1 Alternate Pin Function Description The tables below show the notation for all pin functions available and describe its function. 29.1.
29.1.
29.2 Alternate Pin Functions The tables below show the primary/default function for each pin on a port in the first column, the pin number in the second column, and then all alternate pin functions in the remaining columns. The head row shows what peripheral that enable and use the alternate pin functions. For better flexibility, some alternate functions also have selectable pin locations for their functions, this is noted under the first table where this apply. Table 29-1. Port A - Alternate functions.
Table 29-3. Port C - Alternate functions. PIN # INTERRUPT TCC0(1)(2) AWEXC PC0 16 SYNC OC0A OC0ALS PC1 17 SYNC OC0B OC0AHS XCK0 PC2 18 SYNC/ASYNC OC0C OC0BLS RXD0 PC3 19 SYNC OC0D OC0BHS TXD0 PC4 20 SYNC OC0CLS OC1A SS PC5 21 SYNC OC0CHS OC1B MOSI PC6 22 SYNC OC0DLS MISO RTCOUT PC7 23 SYNC OC0DHS SCK clkPER GND 24 VCC 25 PORT C Notes: 1. 2. 3. 4. 5. 6.
Table 29-5. Port E - Alternate functions. PORT E PIN # INTERRUPT TCE0 USARTE0 TOSC PE0 36 SYNC OC0A PE1 37 SYNC OC0B XCK0 PE2 38 SYNC/ASYNC OC0C RXD0 PE3 39 SYNC OC0D TXD0 PE4 40 SYNC PE5 41 SYNC PE6 42 SYNC TOSC2 PE7 43 SYNC TOSC1 GND 44 VCC 45 TWIE CLOCKOUT EVENTOUT ClkPER EVOUT SDA SCL Table 29-6. Port F - Alternate functions.
30. Peripheral Module Address Map The address maps show the base address for each peripheral and module in Atmel AVR XMEGA C3. For complete register description and summary for each peripheral module, refer to the XMEGA C manual. Table 30-1. Peripheral module address map.
Base address Name Description 0x0660 PORTD Port D 0x0680 PORTE Port E 0x06A0 PORTF Port F 0x07E0 PORTR Port R 0x0800 TCC0 Timer/Counter 0 on port C 0x0840 TCC1 Timer/Counter 1 on port C 0x0880 AWEXC Advanced Waveform Extension on port C 0x0890 HIRESC High Resolution Extension on port C 0x08A0 USARTC0 0x08C0 SPIC 0x08F8 IRCOM 0x0900 TCD0 0x09A0 USARTD0 0x09C0 SPID Serial Peripheral Interface on port D 0x0A00 TCE0 Timer/Counter 0 on port E 0x0A80 AWEXE 0x0AA0 USAR
31.
Mnemonics Operands Description RCALL k Relative Call Subroutine Operation Flags #Clocks PC PC + k + 1 None 2/3 ICALL Indirect Call to (Z) PC(15:0) PC(21:16) Z, 0 None 2/3 EICALL Extended Indirect Call to (Z) PC(15:0) PC(21:16) Z, EIND None 3 call Subroutine PC k None 3/4 RET Subroutine Return PC STACK None 4/5 RETI Interrupt Return PC STACK I 4/5 if (Rd = Rr) PC PC + 2 or 3 None CALL k CPSE Rd,Rr Compare, Skip if Equal 1/2/3 CP Rd,
Mnemonics Operands Description LDI Rd, K Load Immediate Rd K None 1 LDS Rd, k Load Direct from data space Rd (k) None 2 (1) LD Rd, X Load Indirect Rd (X) None 1 (1) LD Rd, X+ Load Indirect and Post-Increment Rd X (X) X+1 None 1 (1) LD Rd, -X Load Indirect and Pre-Decrement X X - 1, Rd (X) X-1 (X) None 2 (1) LD Rd, Y Load Indirect Rd (Y) (Y) None 1 (1) LD Rd, Y+ Load Indirect and Post-Increment Rd Y (Y) Y+1 None 1 (1) LD Rd
Mnemonics Operands Description Operation SPM Z+ Store Program Memory and Post-Increment by 2 IN Rd, A In From I/O Location OUT A, Rr Out To I/O Location PUSH Rr Push Register on Stack POP Rd XCH Flags #Clocks (RAMPZ:Z) Z R1:R0, Z+2 None - Rd I/O(A) None 1 I/O(A) Rr None 1 STACK Rr None 1 Pop Register from Stack Rd STACK None 2 Z, Rd Exchange RAM location Temp Rd (Z) Rd, (Z), Temp None 2 LAS Z, Rd Load and Set RAM location Temp Rd (Z)
Mnemonics Operands Description Operation Flags #Clocks SES Set Signed Test Flag S 1 S 1 CLS Clear Signed Test Flag S 0 S 1 SEV Set Two’s Complement Overflow V 1 V 1 CLV Clear Two’s Complement Overflow V 0 V 1 SET Set T in SREG T 1 T 1 CLT Clear T in SREG T 0 T 1 SEH Set Half Carry Flag in SREG H 1 H 1 CLH Clear Half Carry Flag in SREG H 0 H 1 None 1 None 1 MCU control instructions BREAK Break NOP No Operation SLEEP Sleep
32. Packaging information 32.1 64A PIN 1 B e PIN 1 IDENTIFIER E1 E D1 D C 0°~7° A1 A2 A L COMMON DIMENSIONS (Unit of measure = mm) Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10mm maximum. SYMBOL MIN NOM MAX A – – 1.20 A1 0.05 – 0.15 A2 0.
32.
33. Electrical Characteristics All typical values are measured at T = 25C unless other temperature condition is given. All minimum and maximum values are valid across operating temperature and voltage unless other conditions are given. Note: 33.1 For devices that are not available yet, preliminary values in this datasheet are based on simulations, and/or characterization of similar AVR XMEGA microcontrollers.
Table 33-3. Operating voltage and frequency. Symbol Parameter ClkCPU CPU clock frequency Condition Min. Typ. Max. VCC = 1.6V 0 12 VCC = 1.8V 0 12 VCC = 2.7V 0 32 VCC = 3.6V 0 32 Units MHz The maximum CPU clock frequency depends on VCC. As shown in Figure 33-1 the Frequency vs. VCC curve is linear between 1.8V < VCC < 2.7V. Figure 33-1. Maximum Frequency vs. VCC. MHz 32 Safe Operating Area 12 1.6 1.8 2.7 3.
33.1.3 Current consumption Table 33-4. Current consumption for Active mode and sleep modes. Symbol Parameter Condition 32kHz, Ext. Clk Active power consumption(1) 1MHz, Ext. Clk 2MHz, Ext. Clk 32MHz, Ext. Clk 32kHz, Ext. Clk Idle power consumption(2) 1MHz, Ext. Clk 2MHz, Ext. Clk ICC 32MHz, Ext. Clk Min. Power-down power consumption 50 VCC = 3.0V 130 VCC = 1.8V 215 VCC = 3.0V 475 VCC = 1.8V 445 600 0.95 1.5 7.8 12 VCC = 3.
Table 33-5. Current consumption for modules and peripherals. Symbol Parameter Condition(1) Min. Typ. ULP oscillator 0.9 32.768kHz int. oscillator 29 Max. Units 82 2MHz int. oscillator DFLL enabled with 32.768kHz int. osc. as reference 114 250 32MHz int. oscillator PLL DFLL enabled with 32.768kHz int. osc. as reference 400 20x multiplication factor, 32MHz int. osc. DIV4 as reference 300 Watchdog timer µA 1.0 Continuous mode 140 Sampled mode, includes ULP oscillator 1.
33.1.4 Wake-up time from sleep modes Table 33-6. Device wake-up time from sleep modes with various system clock sources. Symbol Parameter Wake-up time from Idle, Standby, and Extended Standby mode twakeup Min. Typ.(1) External 2MHz clock 2.0 32.768kHz internal oscillator 125 2MHz internal oscillator 2.0 32MHz internal oscillator 0.2 External 2MHz clock 4.6 32.768kHz internal oscillator 330 2MHz internal oscillator 9.5 32MHz internal oscillator 5.6 Max.
33.1.5 I/O Pin Characteristics The I/O pins complies with the JEDEC LVTTL and LVCMOS specification and the high- and low level input and output voltage limits reflect or exceed this specification. Table 33-7. I/O pin characteristics. Symbol Parameter Condition Min. Typ. Max. Units -15 15 mA VCC = 2.4 - 3.6V 0.7*Vcc VCC+0.5 VCC = 1.6 - 2.4V 0.8*VCC VCC+0.5 VCC = 2.4- 3.6V -0.5 0.3*VCC VCC = 1.6 - 2.4V -0.5 0.
33.1.6 ADC characteristics Table 33-8. Power supply, reference and input range. Symbol Parameter AVCC Analog supply voltage VREF Reference voltage Condition Min. Typ. Max. VCC- 0.3 VCC+ 0.3 1 AVCC- 0.6 Units V Rin Input resistance Switched 4.
Table 33-10. Accuracy characteristics. Symbol RES Condition(2) Parameter Resolution 12-bit resolution Differential mode INL(1) Integral non-linearity Single ended unsigned mode Differential mode DNL(1) Differential non-linearity Single ended unsigned mode Offset error Gain error Differential mode Differential mode Min. Typ. Max. Differential 8 12 12 Single ended signed 7 11 11 Single ended unsigned 8 12 12 16ksps, VREF = 3V 0.5 1 16ksps, all VREF 0.
Table 33-11. Gain stage characteristics. Symbol Parameter Condition Min. Typ. Max. Units Rin Input resistance Switched in normal mode 4.0 k Csample Input capacitance Switched in normal mode 4.4 pF Signal range Gain stage output Propagation delay ADC conversion rate 1/2 Clock frequency Same as ADC 100 0 1 0.5x gain, normal mode -1 1x gain, normal mode -1 8x gain, normal mode -1 64x gain, normal mode 5 0.
33.1.8 Bandgap and Internal 1.0V Reference Characteristics Table 33-13. Bandgap and Internal 1.0V reference characteristics. Symbol Parameter Condition Min. As reference for ADC Typ. Max. 1 ClkPER + 2.5µs Startup time As input voltage to ADC and AC Units µs 1.5 Bandgap voltage 1.1 V INT1V Internal 1.00V reference T= 85°C, after calibration Variation over voltage and temperature Calibrated at T= 85°C 0.99 1.0 1.01 1 % 33.1.9 Brownout Detection Characteristics Table 33-14.
33.1.11 Power-on Reset Characteristics Table 33-16. Power-on reset characteristics. Symbol Parameter VPOT-(1) POR threshold voltage falling VCC VPOT+ POR threshold voltage rising VCC Note: 1. Condition Min. Typ. VCC falls faster than 1V/ms 0.4 1.0 VCC falls at 1V/ms or slower 0.8 1.3 Max. Units V 1.3 1.59 Typ. Max. VPOT- values are only valid when BOD is disabled. When BOD is enabled VPOT- = VPOT+. 33.1.12 Flash and EEPROM Memory Characteristics Table 33-17.
33.1.13 Clock and Oscillator Characteristics 33.1.13.1 Calibrated 32.768kHz Internal Oscillator characteristics Table 33-19. 32.768kHz internal oscillator characteristics. Symbol Parameter Condition Min. Frequency Factory calibration accuracy Typ. Max. 32.768 T = 85C, VCC = 3.0V User calibration accuracy Units kHz -0.5 0.5 -0.5 0.5 % 33.1.13.2 Calibrated 2MHz RC Internal Oscillator characteristics Table 33-20. 2MHz internal oscillator characteristics.
33.1.13.5 Internal Phase Locked Loop (PLL) characteristics Table 33-23. Internal PLL characteristics. Symbol fIN Parameter Input frequency Output frequency(1) fOUT Condition Min. Typ. Output frequency must be within fOUT 0.4 64 VCC= 1.6 - 1.8V 20 48 VCC= 2.7 - 3.6V 20 128 Start-up time 25 Re-lock time 25 Max. Units MHz µs Note: 1. The maximum output frequency vs. supply voltage is linear between 1.8V and 2.7V, and can never be higher than four times the maximum CPU frequency. 33.1.
Table 33-25. External clock with prescaler (1)for system clock. Symbol Parameter Condition Clock Frequency (2) 1/tCK tCK Clock Period tCH Clock High Time tCL Clock Low Time tCR Rise Time (for maximum frequency) tCF Fall Time (for maximum frequency) tCK Notes: Min. Typ. VCC = 1.6 - 1.8V 0 90 VCC = 2.7 - 3.6V 0 142 VCC = 1.6 - 1.8V 11 VCC = 2.7 - 3.6V 7 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 Units MHz ns ns ns VCC = 1.6 - 1.
Symbol Parameter Condition 44k 1MHz crystal, CL=20pF 67k 2MHz crystal, CL=20pF 67k 2MHz crystal 82k 8MHz crystal 1500 9MHz crystal 1500 8MHz crystal 2700 9MHz crystal 2700 12MHz crystal 1000 9MHz crystal 3600 12MHz crystal 1300 16MHz crystal 590 9MHz crystal 390 12MHz crystal 50 16MHz crystal 10 9MHz crystal 1500 12MHz crystal 650 16MHz crystal 270 XOSCPWR=1, FRQRANGE=2, CL=20pF 12MHz crystal 1000 16MHz crystal 440 XOSCPWR=1, FRQRANGE=3, CL=20pF 12MHz crystal 130
Symbol Parameter CXTAL1 Parasitic capacitance XTAL1 pin 5.9 CXTAL2 Parasitic capacitance XTAL2 pin 8.3 CLOAD Parasitic capacitance load 3.5 Note: 1. Condition Min. Typ. Max. Units pF Numbers for negative impedance are not tested in production but guaranteed from design and characterization. 33.1.13.8 External 32.768kHz crystal oscillator and TOSC characteristics Table 33-27. External 32.768kHz crystal oscillator and TOSC characteristics.
33.1.14 SPI Characteristics Figure 33-5. SPI timing requirements in master mode. SS tSCKR tMOS tSCKF SCK (CPOL = 0) tSCKW SCK (CPOL = 1) tSCKW tMIS MISO (Data Input) tMIH tSCK MSB LSB tMOH tMOH MOSI (Data Output) MSB LSB Figure 33-6. SPI timing requirements in slave mode.
Table 33-28. SPI timing characteristics and requirements. Symbol Parameter Condition Min. Typ. Max. tSCK SCK period Master (See Table 20-3 in XMEGA C Manual) tSCKW SCK high/low width Master 0.5*SCK tSCKR SCK rise time Master 2.7 tSCKF SCK fall time Master 2.7 tMIS MISO setup to SCK Master 10 tMIH MISO hold after SCK Master 10 tMOS MOSI setup SCK Master 0.
Table 33-29. Two-wire interface characteristics. Symbol Parameter Condition Min. Typ. Max. VIH Input high voltage 0.7*VCC VCC+0.5 VIL Input low voltage -0.5 0.
33.2 ATxmega64C3 33.2.1 Absolute Maximum Ratings Stresses beyond those listed in Table 33-30 under may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 33-30. Absolute maximum ratings. Symbol Parameter Condition Min. Typ. -0.
The maximum CPU clock frequency depends on VCC. As shown in Figure 33-8 the Frequency vs. VCC curve is linear between 1.8V < VCC < 2.7V. Figure 33-8. Maximum Frequency vs. VCC. MHz 32 Safe Operating Area 12 1.6 1.8 2.7 3.
33.2.3 Current consumption Table 33-33. Current consumption for Active mode and sleep modes. Symbol Parameter Condition 32kHz, Ext. Clk Active power consumption(1) 1MHz, Ext. Clk 2MHz, Ext. Clk 32MHz, Ext. Clk 32kHz, Ext. Clk Idle power consumption(2) 1MHz, Ext. Clk 2MHz, Ext. Clk ICC 32MHz, Ext. Clk Min. Power-down power consumption 50 VCC = 3.0V 130 VCC = 1.8V 215 VCC = 3.0V 475 VCC = 1.8V 445 600 0.95 1.5 7.8 12 VCC = 3.
Table 33-34. Current consumption for modules and peripherals. Symbol Parameter Condition(1) Min. Typ. ULP oscillator 0.9 32.768kHz int. oscillator 29 Max. Units 82 2MHz int. oscillator DFLL enabled with 32.768kHz int. osc. as reference 114 250 32MHz int. oscillator PLL DFLL enabled with 32.768kHz int. osc. as reference 400 20x multiplication factor, 32MHz int. osc. DIV4 as reference 300 Watchdog timer µA 1.0 Continuous mode 140 Sampled mode, includes ULP oscillator 1.
33.2.4 Wake-up time from sleep modes Table 33-35. Device wake-up time from sleep modes with various system clock sources. Symbol Parameter Wake-up time from Idle, Standby, and Extended Standby mode twakeup Min. Typ. (1) External 2MHz clock 2.0 32.768kHz internal oscillator 125 2MHz internal oscillator 2.0 32MHz internal oscillator 0.2 External 2MHz clock 4.6 32.768kHz internal oscillator 330 2MHz internal oscillator 9.5 32MHz internal oscillator 5.6 Max.
33.2.5 I/O Pin Characteristics The I/O pins complies with the JEDEC LVTTL and LVCMOS specification and the high- and low level input and output voltage limits reflect or exceed this specification. Table 33-36. I/O pin characteristics. Symbol Parameter Condition Min. Typ. Max. Units -15 15 mA VCC = 2.4 - 3.6V 0.7*Vcc VCC+0.5 VCC = 1.6 - 2.4V 0.8*VCC VCC+0.5 VCC = 2.4- 3.6V -0.5 0.3*VCC VCC = 1.6 - 2.4V -0.5 0.
33.2.6 ADC characteristics Table 33-37. Power supply, reference and input range. Symbol Parameter AVCC Analog supply voltage VREF Reference voltage Condition Min. Typ. Max. VCC- 0.3 VCC+ 0.3 1 AVCC- 0.6 Units V Rin Input resistance Switched 4.
Table 33-39. Accuracy characteristics. Symbol RES Condition(2) Parameter Resolution 12-bit resolution Differential mode INL(1) Integral non-linearity Single ended unsigned mode Differential mode DNL(1) Differential non-linearity Single ended unsigned mode Offset error Gain error Differential mode Differential mode Min. Typ. Max. Differential 8 12 12 Single ended signed 7 11 11 Single ended unsigned 8 12 12 16ksps, VREF = 3V 0.5 1 16ksps, all VREF 0.
Table 33-40. Gain stage characteristics. Symbol Parameter Condition Min. Typ. Max. Units Rin Input resistance Switched in normal mode 4.0 k Csample Input capacitance Switched in normal mode 4.4 pF Signal range Gain stage output Propagation delay ADC conversion rate 1/2 Clock frequency Same as ADC 100 0 1 0.5x gain, normal mode -1 1x gain, normal mode -1 8x gain, normal mode -1 64x gain, normal mode 5 0.
33.2.8 Bandgap and Internal 1.0V Reference Characteristics Table 33-42. Bandgap and Internal 1.0V reference characteristics. Symbol Parameter Condition Min. As reference for ADC Typ. Max. 1 ClkPER + 2.5µs Startup time As input voltage to ADC and AC Units µs 1.5 Bandgap voltage 1.1 V INT1V Internal 1.00V reference T= 85°C, after calibration Variation over voltage and temperature Calibrated at T= 85°C 0.99 1.0 1.01 1 % 33.2.9 Brownout Detection Characteristics Table 33-43.
33.2.11 Power-on Reset Characteristics Table 33-45. Power-on reset characteristics. Symbol Parameter VPOT- (1) POR threshold voltage falling VCC VPOT+ POR threshold voltage rising VCC Note: 1. Condition Min. Typ. VCC falls faster than 1V/ms 0.4 1.0 VCC falls at 1V/ms or slower 0.8 1.3 Max. Units V 1.3 1.59 Typ. Max. VPOT- values are only valid when BOD is disabled. When BOD is enabled VPOT- = VPOT+. 33.2.12 Flash and EEPROM Memory Characteristics Table 33-46.
33.2.13 Clock and Oscillator Characteristics 33.2.13.1 Calibrated 32.768kHz Internal Oscillator characteristics Table 33-48. 32.768kHz internal oscillator characteristics. Symbol Parameter Condition Min. Frequency Factory calibration accuracy Typ. Max. 32.768 T = 85C, VCC = 3.0V User calibration accuracy Units kHz -0.5 0.5 -0.5 0.5 % 33.2.13.2 Calibrated 2MHz RC Internal Oscillator characteristics Table 33-49. 2MHz internal oscillator characteristics.
33.2.13.5 Internal Phase Locked Loop (PLL) characteristics Table 33-52. Internal PLL characteristics. Symbol fIN Parameter Input frequency Output frequency (1) fOUT Condition Min. Typ. Output frequency must be within fOUT 0.4 64 VCC= 1.6 - 1.8V 20 48 VCC= 2.7 - 3.6V 20 128 Start-up time 25 Re-lock time 25 Max. Units MHz µs Note: 1. The maximum output frequency vs. supply voltage is linear between 1.8V and 2.7V, and can never be higher than four times the maximum CPU frequency. 33.
Table 33-54. External clock with prescaler (1)for system clock. Symbol Parameter Condition Clock Frequency (2) 1/tCK tCK Clock Period tCH Clock High Time tCL Clock Low Time tCR Rise Time (for maximum frequency) tCF Fall Time (for maximum frequency) tCK Notes: Min. Typ. VCC = 1.6 - 1.8V 0 90 VCC = 2.7 - 3.6V 0 142 VCC = 1.6 - 1.8V 11 VCC = 2.7 - 3.6V 7 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 Units MHz ns ns ns VCC = 1.6 - 1.
Symbol Parameter Condition 44k 1MHz crystal, CL=20pF 67k 2MHz crystal, CL=20pF 67k 2MHz crystal 82k 8MHz crystal 1500 9MHz crystal 1500 8MHz crystal 2700 9MHz crystal 2700 12MHz crystal 1000 9MHz crystal 3600 12MHz crystal 1300 16MHz crystal 590 9MHz crystal 390 12MHz crystal 50 16MHz crystal 10 9MHz crystal 1500 12MHz crystal 650 16MHz crystal 270 XOSCPWR=1, FRQRANGE=2, CL=20pF 12MHz crystal 1000 16MHz crystal 440 XOSCPWR=1, FRQRANGE=3, CL=20pF 12MHz crystal 130
Symbol Parameter CXTAL1 Parasitic capacitance XTAL1 pin 5.9 CXTAL2 Parasitic capacitance XTAL2 pin 8.3 CLOAD Parasitic capacitance load 3.5 Note: 1. Condition Min. Typ. Max. Units pF Numbers for negative impedance are not tested in production but guaranteed from design and characterization. 33.2.13.8 External 32.768kHz crystal oscillator and TOSC characteristics Table 33-56. External 32.768kHz crystal oscillator and TOSC characteristics.
33.2.14 SPI Characteristics Figure 33-12.SPI timing requirements in master mode. SS tSCKR tMOS tSCKF SCK (CPOL = 0) tSCKW SCK (CPOL = 1) tSCKW tMIS MISO (Data Input) tMIH tSCK MSB LSB tMOH tMOH MOSI (Data Output) MSB LSB Figure 33-13.SPI timing requirements in slave mode.
Table 33-57. SPI timing characteristics and requirements. Symbol Parameter Condition Min. Typ. Max. tSCK SCK period Master (See Table 20-3 in XMEGA C Manual) tSCKW SCK high/low width Master 0.5*SCK tSCKR SCK rise time Master 2.7 tSCKF SCK fall time Master 2.7 tMIS MISO setup to SCK Master 10 tMIH MISO hold after SCK Master 10 tMOS MOSI setup SCK Master 0.
Table 33-58. Two-wire interface characteristics. Symbol Parameter Condition Min. Typ. Max. VIH Input high voltage 0.7VCC VCC+0.5 VIL Input low voltage -0.5 0.
33.3 ATxmega128C3 33.3.1 Absolute Maximum Ratings Stresses beyond those listed in Table 33-59 under may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 33-59. Absolute maximum ratings. Symbol Parameter Condition Min. Typ.
The maximum CPU clock frequency depends on VCC. As shown in Figure 33-15 the Frequency vs. VCC curve is linear between 1.8V < VCC < 2.7V. Figure 33-15.Maximum Frequency vs. VCC. MHz 32 Safe Operating Area 12 1.6 1.8 2.7 3.
33.3.3 Current consumption Table 33-62. Current consumption for Active mode and sleep modes. Symbol Parameter Condition 32kHz, Ext. Clk Active power consumption(1) 1MHz, Ext. Clk 2MHz, Ext. Clk 32MHz, Ext. Clk 32kHz, Ext. Clk Idle power consumption(2) 1MHz, Ext. Clk 2MHz, Ext. Clk ICC 32MHz, Ext. Clk Min. Power-down power consumption 55 VCC = 3.0V 135 VCC = 1.8V 237 VCC = 3.0V 515 VCC = 1.8V 425 700 0.9 1.5 8.3 12 VCC = 3.
Table 33-63. Current consumption for modules and peripherals. Symbol Parameter Condition (1) Min. Typ. ULP oscillator 0.9 32.768kHz int. oscillator 26 Max. Units 79 2MHz int. oscillator DFLL enabled with 32.768kHz int. osc. as reference 110 245 32MHz int. oscillator PLL DFLL enabled with 32.768kHz int. osc. as reference 415 20x multiplication factor, 32MHz int. osc. DIV4 as reference 305 Watchdog timer µA 1.0 Continuous mode 138 Sampled mode, includes ULP oscillator 1.
33.3.4 Wake-up time from sleep modes Table 33-64. Device wake-up time from sleep modes with various system clock sources. Symbol Parameter Wake-up time from Idle, Standby, and Extended Standby mode twakeup Min. Typ. (1) External 2MHz clock 2.0 32.768kHz internal oscillator 130 2MHz internal oscillator 2.0 32MHz internal oscillator 0.2 External 2MHz clock 4.5 32.768kHz internal oscillator 320 2MHz internal oscillator 9.0 32MHz internal oscillator 6.5 Max.
33.3.5 I/O Pin Characteristics The I/O pins complies with the JEDEC LVTTL and LVCMOS specification and the high- and low level input and output voltage limits reflect or exceed this specification. Table 33-65. I/O pin characteristics. Symbol Parameter Condition Min. Typ. Max. Units -15 15 mA VCC = 2.4 - 3.6V 0.7*Vcc VCC+0.5 VCC = 1.6 - 2.4V 0.8*VCC VCC+0.5 VCC = 2.4- 3.6V -0.5 0.3*VCC VCC = 1.6 - 2.4V -0.5 0.
33.3.6 ADC characteristics Table 33-66. Power supply, reference and input range. Symbol Parameter AVCC Analog supply voltage VREF Reference voltage Condition Min. Typ. Max. VCC- 0.3 VCC+ 0.3 1 AVCC- 0.6 Units V Rin Input resistance Switched 4.
Table 33-68. Accuracy characteristics. Symbol RES Condition(2) Parameter Resolution 12-bit resolution Differential mode INL(1) Integral non-linearity Single ended unsigned mode Differential mode DNL(1) Differential non-linearity Single ended unsigned mode Offset error Gain error Differential mode Differential mode Min. Typ. Max. Differential 8 12 12 Single ended signed 7 11 11 Single ended unsigned 8 12 12 16ksps, VREF = 3V 0.5 1 16ksps, all VREF 0.
Table 33-69. Gain stage characteristics. Symbol Rin Csample Parameter Condition Min. Typ. Max. Units Input resistance Switched in normal mode 4.0 k Input capacitance Switched in normal mode 4.4 pF Signal range Gain stage output Propagation delay ADC conversion rate 1/2 Clock frequency Same as ADC 100 0 1 0.5x gain, normal mode -1 1x gain, normal mode -1 8x gain, normal mode -1 64x gain, normal mode 5 0.
33.3.8 Bandgap and Internal 1.0V Reference Characteristics Table 33-71. Bandgap and Internal 1.0V reference characteristics. Symbol Parameter Condition Min. As reference for ADC Typ. Max. 1 ClkPER + 2.5µs Startup time As input voltage to ADC and AC Units µs 1.5 Bandgap voltage 1.1 V INT1V Internal 1.00V reference T= 85°C, after calibration Variation over voltage and temperature Calibrated at T= 85°C 0.99 1.0 1.01 1 % 33.3.9 Brownout Detection Characteristics Table 33-72.
33.3.11 Power-on Reset Characteristics Table 33-74. Power-on reset characteristics. Symbol Parameter VPOT- (1) POR threshold voltage falling VCC VPOT+ POR threshold voltage rising VCC Note: 1. Condition Min. Typ. VCC falls faster than 1V/ms 0.4 1.0 VCC falls at 1V/ms or slower 0.8 1.3 Max. Units V 1.3 1.59 Typ. Max. VPOT- values are only valid when BOD is disabled. When BOD is enabled VPOT- = VPOT+. 33.3.12 Flash and EEPROM Memory Characteristics Table 33-75.
33.3.13 Clock and Oscillator Characteristics 33.3.13.1 Calibrated 32.768kHz Internal Oscillator characteristics Table 33-77. 32.768kHz internal oscillator characteristics. Symbol Parameter Condition Min. Frequency Factory calibration accuracy Typ. Max. 32.768 T = 85C, VCC = 3.0V User calibration accuracy Units kHz -0.5 0.5 -0.5 0.5 % 33.3.13.2 Calibrated 2MHz RC Internal Oscillator characteristics Table 33-78. 2MHz internal oscillator characteristics.
33.3.13.5 Internal Phase Locked Loop (PLL) characteristics Table 33-81. Internal PLL characteristics. Symbol fIN Parameter Input frequency Output frequency (1) fOUT Condition Min. Typ. Output frequency must be within fOUT 0.4 64 VCC= 1.6 - 1.8V 20 48 VCC= 2.7 - 3.6V 20 128 Start-up time 25 Re-lock time 25 Max. Units MHz µs Note: 1. The maximum output frequency vs. supply voltage is linear between 1.8V and 2.7V, and can never be higher than four times the maximum CPU frequency. 33.
Table 33-83. External clock with prescaler (1)for system clock. Symbol Parameter Condition Clock Frequency (2) 1/tCK tCK Clock Period tCH Clock High Time tCL Clock Low Time tCR Rise Time (for maximum frequency) tCF Fall Time (for maximum frequency) tCK Notes: Min. Typ. VCC = 1.6 - 1.8V 0 90 VCC = 2.7 - 3.6V 0 142 VCC = 1.6 - 1.8V 11 VCC = 2.7 - 3.6V 7 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 Units MHz ns ns ns VCC = 1.6 - 1.
Symbol Parameter Condition 44k 1MHz crystal, CL=20pF 67k 2MHz crystal, CL=20pF 67k 2MHz crystal 82k 8MHz crystal 1500 9MHz crystal 1500 8MHz crystal 2700 9MHz crystal 2700 12MHz crystal 1000 9MHz crystal 3600 12MHz crystal 1300 16MHz crystal 590 9MHz crystal 390 12MHz crystal 50 16MHz crystal 10 9MHz crystal 1500 12MHz crystal 650 16MHz crystal 270 XOSCPWR=1, FRQRANGE=2, CL=20pF 12MHz crystal 1000 16MHz crystal 440 XOSCPWR=1, FRQRANGE=3, CL=20pF 12MHz crystal 130
Symbol Parameter CXTAL1 Parasitic capacitance XTAL1 pin 5.9 CXTAL2 Parasitic capacitance XTAL2 pin 8.3 CLOAD Parasitic capacitance load 3.5 Note: 1. Condition Min. Typ. Max. Units pF Numbers for negative impedance are not tested in production but guaranteed from design and characterization. 33.3.13.8 External 32.768kHz crystal oscillator and TOSC characteristics Table 33-85. External 32.768kHz crystal oscillator and TOSC characteristics.
33.3.14 SPI Characteristics Figure 33-19.SPI timing requirements in master mode. SS tSCKR tMOS tSCKF SCK (CPOL = 0) tSCKW SCK (CPOL = 1) tSCKW tMIS MISO (Data Input) tMIH tSCK MSB LSB tMOH tMOH MOSI (Data Output) MSB LSB Figure 33-20.SPI timing requirements in slave mode.
Table 33-86. SPI timing characteristics and requirements. Symbol Parameter Condition Min. Typ. Max. tSCK SCK period Master (See Table 20-3 in XMEGA C Manual) tSCKW SCK high/low width Master 0.5*SCK tSCKR SCK rise time Master 2.7 tSCKF SCK fall time Master 2.7 tMIS MISO setup to SCK Master 10 tMIH MISO hold after SCK Master 10 tMOS MOSI setup SCK Master 0.
Table 33-87. Two-wire interface characteristics. Symbol Parameter Condition Min. Typ. Max. VIH Input high voltage 0.7*VCC VCC+0.5 VIL Input low voltage -0.5 0.
33.4 ATxmega192C3 33.4.1 Absolute Maximum Ratings Stresses beyond those listed in Table 33-88 under may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 33-88. Absolute maximum ratings. Symbol Parameter Condition Min. Typ.
The maximum CPU clock frequency depends on VCC. As shown in Figure 33-22 the Frequency vs. VCC curve is linear between 1.8V < VCC < 2.7V. Figure 33-22.Maximum Frequency vs. VCC. MHz 32 Safe Operating Area 12 1.6 1.8 2.7 3.
33.4.3 Current consumption Table 33-91. Current consumption for Active mode and sleep modes. Symbol Parameter Condition 32kHz, Ext. Clk Active power consumption(1) 1MHz, Ext. Clk 2MHz, Ext. Clk 32MHz, Ext. Clk 32kHz, Ext. Clk Idle power consumption(2) 1MHz, Ext. Clk 2MHz, Ext. Clk ICC 32MHz, Ext. Clk Min. Power-down power consumption 60 VCC = 3.0V 140 VCC = 1.8V 245 VCC = 3.0V 550 VCC = 1.8V 440 700 0.9 1.5 9.0 15 VCC = 3.
Table 33-92. Current consumption for modules and peripherals. Symbol Parameter Condition (1) Min. Typ. ULP oscillator 0.9 32.768kHz int. oscillator 25 Max. Units 78 2MHz int. oscillator DFLL enabled with 32.768kHz int. osc. as reference 110 250 32MHz int. oscillator PLL DFLL enabled with 32.768kHz int. osc. as reference 440 20x multiplication factor, 32MHz int. osc. DIV4 as reference 310 Watchdog timer µA 1.0 Continuous mode 132 Sampled mode, includes ULP oscillator 1.
33.4.4 Wake-up time from sleep modes Table 33-93. Device wake-up time from sleep modes with various system clock sources. Symbol Parameter Wake-up time from idle, standby, and extended standby mode twakeup Min. Typ. (1) External 2MHz clock 2.0 32.768kHz internal oscillator 125 2MHz internal oscillator 2.0 32MHz internal oscillator 0.2 External 2MHz clock 4.6 32.768kHz internal oscillator 330 2MHz internal oscillator 9.5 32MHz internal oscillator 5.6 Max.
33.4.5 I/O Pin Characteristics The I/O pins complies with the JEDEC LVTTL and LVCMOS specification and the high- and low level input and output voltage limits reflect or exceed this specification. Table 33-94. I/O pin characteristics. Symbol Parameter Condition Min. Typ. Max. Units -15 15 mA VCC = 2.4 - 3.6V 0.7*Vcc VCC+0.5 VCC = 1.6 - 2.4V 0.8*VCC VCC+0.5 VCC = 2.4- 3.6V -0.5 0.3*VCC VCC = 1.6 - 2.4V -0.5 0.
33.4.6 ADC characteristics Table 33-95. Power supply, reference and input range. Symbol Parameter AVCC Analog supply voltage VREF Reference voltage Condition Min. Typ. Max. VCC- 0.3 VCC+ 0.3 1 AVCC- 0.6 Units V Rin Input resistance Switched 4.
Table 33-97. Accuracy characteristics. Symbol RES Condition(2) Parameter Resolution 12-bit resolution Differential mode INL(1) Integral non-linearity Single ended unsigned mode Differential mode DNL(1) Differential non-linearity Single ended unsigned mode Offset error Gain error Differential mode Differential mode Min. Typ. Max. Differential 8 12 12 Single ended signed 7 11 11 Single ended unsigned 8 12 12 16ksps, VREF = 3V 0.5 1 16ksps, all VREF 0.
Table 33-98. Gain stage characteristics. Symbol Parameter Condition Min. Typ. Max. Units Rin Input resistance Switched in normal mode 4.0 k Csample Input capacitance Switched in normal mode 4.4 pF Signal range Gain stage output Propagation delay ADC conversion rate 1/2 Clock frequency Same as ADC 100 0 1 0.5x gain, normal mode -1 1x gain, normal mode -1 8x gain, normal mode -1 64x gain, normal mode 5 0.
33.4.8 Bandgap and Internal 1.0V Reference Characteristics Table 33-100.Bandgap and Internal 1.0V reference characteristics. Symbol Parameter Condition Min. As reference for ADC Typ. Max. 1 ClkPER + 2.5µs Startup time As input voltage to ADC and AC Units µs 1.5 Bandgap voltage 1.1 V INT1V Internal 1.00V reference T= 85°C, after calibration Variation over voltage and temperature Calibrated at T= 85°C 0.99 1.0 1.01 1 % 33.4.9 Brownout Detection Characteristics Table 33-101.
33.4.11 Power-on Reset Characteristics Table 33-103. Power-on reset characteristics. Symbol Parameter VPOT- (1) POR threshold voltage falling VCC VPOT+ POR threshold voltage rising VCC Note: 1. Condition Min. Typ. VCC falls faster than 1V/ms 0.4 1.0 VCC falls at 1V/ms or slower 0.8 1.3 Max. Units V 1.3 1.59 Typ. Max. VPOT- values are only valid when BOD is disabled. When BOD is enabled VPOT- = VPOT+. 33.4.12 Flash and EEPROM Memory Characteristics Table 33-104.
33.4.13 Clock and Oscillator Characteristics 33.4.13.1 Calibrated 32.768kHz Internal Oscillator characteristics Table 33-106. 32.768kHz internal oscillator characteristics. Symbol Parameter Condition Min. Frequency Factory calibration accuracy Typ. Max. 32.768 T = 85C, VCC = 3.0V User calibration accuracy Units kHz -0.5 0.5 -0.5 0.5 % 33.4.13.2 Calibrated 2MHz RC Internal Oscillator characteristics Table 33-107. 2MHz internal oscillator characteristics.
33.4.13.5 Internal Phase Locked Loop (PLL) characteristics Table 33-110. Internal PLL characteristics. Symbol fIN Parameter Input frequency Output frequency (1) fOUT Condition Min. Typ. Output frequency must be within fOUT 0.4 64 VCC= 1.6 - 1.8V 20 48 VCC= 2.7 - 3.6V 20 128 Start-up time 25 Re-lock time 25 Max. Units MHz µs Note: 1. The maximum output frequency vs. supply voltage is linear between 1.8V and 2.7V, and can never be higher than four times the maximum CPU frequency. 33.
Table 33-112.External clock with prescaler (1)for system clock. Symbol Parameter Condition Clock Frequency (2) 1/tCK tCK Clock Period tCH Clock High Time tCL Clock Low Time tCR Rise Time (for maximum frequency) tCF Fall Time (for maximum frequency) tCK Notes: Min. Typ. VCC = 1.6 - 1.8V 0 90 VCC = 2.7 - 3.6V 0 142 VCC = 1.6 - 1.8V 11 VCC = 2.7 - 3.6V 7 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 Units MHz ns ns ns VCC = 1.6 - 1.
Symbol Parameter Condition 44k 1MHz crystal, CL=20pF 67k 2MHz crystal, CL=20pF 67k 2MHz crystal 82k 8MHz crystal 1500 9MHz crystal 1500 8MHz crystal 2700 9MHz crystal 2700 12MHz crystal 1000 9MHz crystal 3600 12MHz crystal 1300 16MHz crystal 590 9MHz crystal 390 12MHz crystal 50 16MHz crystal 10 9MHz crystal 1500 12MHz crystal 650 16MHz crystal 270 XOSCPWR=1, FRQRANGE=2, CL=20pF 12MHz crystal 1000 16MHz crystal 440 XOSCPWR=1, FRQRANGE=3, CL=20pF 12MHz crystal 130
Symbol Parameter CXTAL1 Parasitic capacitance XTAL1 pin 5.9 CXTAL2 Parasitic capacitance XTAL2 pin 8.3 CLOAD Parasitic capacitance load 3.5 Note: 1. Condition Min. Typ. Max. Units pF Numbers for negative impedance are not tested in production but guaranteed from design and characterization. 33.4.13.8 External 32.768kHz crystal oscillator and TOSC characteristics Table 33-114.External 32.768kHz crystal oscillator and TOSC characteristics.
33.4.14 SPI Characteristics Figure 33-26.SPI timing requirements in master mode. SS tSCKR tMOS tSCKF SCK (CPOL = 0) tSCKW SCK (CPOL = 1) tSCKW tMIS MISO (Data Input) tMIH tSCK MSB LSB tMOH tMOH MOSI (Data Output) MSB LSB Figure 33-27.SPI timing requirements in slave mode.
Table 33-115.SPI timing characteristics and requirements. Symbol Parameter Condition Min. Typ. Max. tSCK SCK period Master (See Table 20-3 in XMEGA C Manual) tSCKW SCK high/low width Master 0.5*SCK tSCKR SCK rise time Master 2.7 tSCKF SCK fall time Master 2.7 tMIS MISO setup to SCK Master 10 tMIH MISO hold after SCK Master 10 tMOS MOSI setup SCK Master 0.
Table 33-116. Two-wire interface characteristics. Symbol Parameter Condition Min. Typ. Max. VIH Input high voltage 0.7VCC VCC+0.5 VIL Input low voltage -0.5 0.
33.5 ATxmega256C3 33.5.1 Absolute Maximum Ratings Stresses beyond those listed in Table 33-117 under may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 33-117. Absolute maximum ratings. Symbol Parameter Condition Min. Typ.
The maximum CPU clock frequency depends on VCC. As shown in Figure 33-29 the Frequency vs. VCC curve is linear between 1.8V < VCC < 2.7V. Figure 33-29.Maximum Frequency vs. VCC. MHz 32 Safe Operating Area 12 1.6 1.8 2.7 3.
33.5.3 Current consumption Table 33-120.Current consumption for Active mode and sleep modes. Symbol Parameter Condition 32kHz, Ext. Clk Active power consumption(1) 1MHz, Ext. Clk 2MHz, Ext. Clk 32MHz, Ext. Clk 32kHz, Ext. Clk Idle power consumption(2) 1MHz, Ext. Clk 2MHz, Ext. Clk ICC 32MHz, Ext. Clk Min. Power-down power consumption 60 VCC = 3.0V 140 VCC = 1.8V 245 VCC = 3.0V 550 VCC = 1.8V 440 700 0.9 1.5 9.0 15 VCC = 3.
Table 33-121.Current consumption for modules and peripherals. Symbol Parameter Condition(1) Min. Typ. ULP oscillator 0.9 32.768kHz int. oscillator 25 Max. Units 78 2MHz int. oscillator DFLL enabled with 32.768kHz int. osc. as reference 110 250 32MHz int. oscillator PLL DFLL enabled with 32.768kHz int. osc. as reference 440 20x multiplication factor, 32MHz int. osc. DIV4 as reference 310 Watchdog timer µA 1.0 Continuous mode 132 Sampled mode, includes ULP oscillator 1.
33.5.4 Wake-up time from sleep modes Table 33-122. Device wake-up time from sleep modes with various system clock sources. Symbol Parameter Wake-up time from idle, standby, and extended standby mode twakeup Min. Typ.(1) External 2MHz clock 2.0 32.768kHz internal oscillator 125 2MHz internal oscillator 2.0 32MHz internal oscillator 0.2 External 2MHz clock 4.6 32.768kHz internal oscillator 330 2MHz internal oscillator 9.5 32MHz internal oscillator 5.6 Max.
33.5.5 I/O Pin Characteristics The I/O pins complies with the JEDEC LVTTL and LVCMOS specification and the high- and low level input and output voltage limits reflect or exceed this specification. Table 33-123. I/O pin characteristics. Symbol Parameter Condition Min. Typ. Max. Units -15 15 mA VCC = 2.4 - 3.6V 0.7*Vcc VCC+0.5 VCC = 1.6 - 2.4V 0.8*VCC VCC+0.5 VCC = 2.4- 3.6V -0.5 0.3*VCC VCC = 1.6 - 2.4V -0.5 0.
33.5.6 ADC characteristics Table 33-124. Power supply, reference and input range. Symbol Parameter AVCC Analog supply voltage VREF Reference voltage Condition Min. Typ. Max. VCC- 0.3 VCC+ 0.3 1 AVCC- 0.6 Units V Rin Input resistance Switched 4.
Table 33-126.Accuracy characteristics. Symbol RES Condition(2) Parameter Resolution 12-bit resolution Differential mode INL(1) Integral non-linearity Single ended unsigned mode Differential mode DNL(1) Differential non-linearity Single ended unsigned mode Offset error Gain error Differential mode Differential mode Min. Typ. Max. Differential 8 12 12 Single ended signed 7 11 11 Single ended unsigned 8 12 12 16ksps, VREF = 3V 0.5 1 16ksps, all VREF 0.
Table 33-127. Gain stage characteristics. Symbol Parameter Condition Min. Typ. Max. Units Rin Input resistance Switched in normal mode 4.0 k Csample Input capacitance Switched in normal mode 4.4 pF Signal range Gain stage output Propagation delay ADC conversion rate 1/2 Clock frequency Same as ADC 100 0 1 0.5x gain, normal mode -1 1x gain, normal mode -1 8x gain, normal mode -1 64x gain, normal mode 5 0.
33.5.8 Bandgap and Internal 1.0V Reference Characteristics Table 33-129.Bandgap and Internal 1.0V reference characteristics. Symbol Parameter Condition Min. As reference for ADC Typ. Max. 1 ClkPER + 2.5µs Startup time As input voltage to ADC and AC Units µs 1.5 Bandgap voltage 1.1 V INT1V Internal 1.00V reference T= 85°C, after calibration Variation over voltage and temperature Calibrated at T= 85°C 0.99 1.0 1.01 1 % 33.5.9 Brownout Detection Characteristics Table 33-130.
33.5.11 Power-on Reset Characteristics Table 33-132.Power-on reset characteristics. Symbol Parameter VPOT- (1) POR threshold voltage falling VCC VPOT+ POR threshold voltage rising VCC Note: 1. Condition Min. Typ. VCC falls faster than 1V/ms 0.4 1.0 VCC falls at 1V/ms or slower 0.8 1.3 Max. Units V 1.3 1.59 Typ. Max. VPOT- values are only valid when BOD is disabled. When BOD is enabled VPOT- = VPOT+. 33.5.12 Flash and EEPROM Memory Characteristics Table 33-133.
33.5.13 Clock and Oscillator Characteristics 33.5.13.1 Calibrated 32.768kHz Internal Oscillator characteristics Table 33-135. 32.768kHz internal oscillator characteristics. Symbol Parameter Condition Min. Frequency Factory calibration accuracy Typ. Max. 32.768 T = 85C, VCC = 3.0V User calibration accuracy Units kHz -0.5 0.5 -0.5 0.5 % 33.5.13.2 Calibrated 2MHz RC Internal Oscillator characteristics Table 33-136. 2MHz internal oscillator characteristics.
33.5.13.5 Internal Phase Locked Loop (PLL) characteristics Table 33-139.Internal PLL characteristics. Symbol fIN Parameter Input frequency Output frequency(1) fOUT Condition Min. Typ. Output frequency must be within fOUT 0.4 64 VCC= 1.6 - 1.8V 20 48 VCC= 2.7 - 3.6V 20 128 Start-up time 25 Re-lock time 25 Max. Units MHz µs Note: 1. The maximum output frequency vs. supply voltage is linear between 1.8V and 2.7V, and can never be higher than four times the maximum CPU frequency. 33.5.
Table 33-141.External clock with prescaler (1)for system clock. Symbol Parameter Condition Clock Frequency (2) 1/tCK tCK Clock Period tCH Clock High Time tCL Clock Low Time tCR Rise Time (for maximum frequency) tCF Fall Time (for maximum frequency) tCK Notes: Min. Typ. VCC = 1.6 - 1.8V 0 90 VCC = 2.7 - 3.6V 0 142 VCC = 1.6 - 1.8V 11 VCC = 2.7 - 3.6V 7 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 VCC = 1.6 - 1.8V 4.5 VCC = 2.7 - 3.6V 2.4 Units MHz ns ns ns VCC = 1.6 - 1.
Symbol Parameter Condition 44k 1MHz crystal, CL=20pF 67k 2MHz crystal, CL=20pF 67k 2MHz crystal 82k 8MHz crystal 1500 9MHz crystal 1500 8MHz crystal 2700 9MHz crystal 2700 12MHz crystal 1000 9MHz crystal 3600 12MHz crystal 1300 16MHz crystal 590 9MHz crystal 390 12MHz crystal 50 16MHz crystal 10 9MHz crystal 1500 12MHz crystal 650 16MHz crystal 270 XOSCPWR=1, FRQRANGE=2, CL=20pF 12MHz crystal 1000 16MHz crystal 440 XOSCPWR=1, FRQRANGE=3, CL=20pF 12MHz crystal 130
Symbol Parameter CXTAL1 Parasitic capacitance XTAL1 pin 5.9 CXTAL2 Parasitic capacitance XTAL2 pin 8.3 CLOAD Parasitic capacitance load 3.5 Note: 1. Condition Min. Typ. Max. Units pF Numbers for negative impedance are not tested in production but guaranteed from design and characterization. 33.5.13.8 External 32.768kHz crystal oscillator and TOSC characteristics Table 33-143.External 32.768kHz crystal oscillator and TOSC characteristics.
33.5.14 SPI Characteristics Figure 33-33.SPI timing requirements in master mode. SS tSCKR tMOS tSCKF SCK (CPOL = 0) tSCKW SCK (CPOL = 1) tSCKW tMIS MISO (Data Input) tMIH tSCK MSB LSB tMOH tMOH MOSI (Data Output) MSB LSB Figure 33-34.SPI timing requirements in slave mode.
Table 33-144.SPI timing characteristics and requirements. Symbol Parameter Condition Min. Typ. Max. tSCK SCK period Master (See Table 20-3 in XMEGA C Manual) tSCKW SCK high/low width Master 0.5*SCK tSCKR SCK rise time Master 2.7 tSCKF SCK fall time Master 2.7 tMIS MISO setup to SCK Master 10 tMIH MISO hold after SCK Master 10 tMOS MOSI setup SCK Master 0.
Table 33-145.Two-wire interface characteristics. Symbol Parameter Condition Min. Typ. Max. VIH Input high voltage 0.7*VCC VCC+0.5 VIL Input low voltage -0.5 0.
34. Typical Characteristics 34.1 ATxmega32C3 34.1.1 Current consumption 34.1.1.1 Active mode supply current Figure 34-1. Active supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 800 3.6 V IccV [µA ] 700 3.3 V 600 3.0 V 500 2.7 V 400 2.2 V 300 1.8 V 1.6 V 200 100 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency [MHz] Figure 34-2. Active supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 12 3.6 V 10 3.3 V Icc [mA] 8 3.0 V 2.
Figure 34-3. Active mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 250 -40 °C Icc[µA] 225 200 25 °C 175 85 °C 150 125 100 75 50 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-4. Active mode supply current vs. VCC. fSYS = 1MHz external clock. Icc [µA] 900 800 -40 °C 25 °C 700 85 °C 600 500 400 300 200 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-5. Active mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 1400 1300 -40 °C 25 °C 85 °C 1200 1100 Icc [µA] 1000 900 800 700 600 500 400 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-6. Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 5.0 -40 °C 25 °C 85 °C 4.5 Icc [mA] 4.0 3.5 3.0 2.5 2.0 1.5 1.0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-7. Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator. 12 -40 °C 11 25 °C Icc [mA] 10 85 °C 9 8 7 6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 VCC [V] 34.1.1.2 Idle mode supply current Figure 34-8. Idle mode supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 140 3.6 V 120 3.3 V 100 Icc [µA] 3.0 V 80 2.7 V 60 2.2 V 40 1.8 V 1.6 V 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.
Figure 34-9. Idle mode supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 4.5 4.0 3.6 V Icc [mA] 3.5 3.3 V 3.0 3.0 V 2.5 2.7 V 2.0 1.5 2.2 V 1.0 1.8 V 0.5 1.6 V 0 0 4 8 12 16 20 24 28 32 Frequency [MHz] Figure 34-10. Idle mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 32 31.5 -40 °C 85 °C 31 Icc[µA ] 30.5 25 °C 30 29.5 29 28.5 28 27.5 27 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-11. Idle mode supply current vs. VCC. fSYS = 1MHz external clock. 130 85 °C 25 °C -40 °C 120 110 Icc [µA] 100 90 80 70 60 50 40 30 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-12. Idle mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 350 -40 °C 25 °C 85 °C 325 300 Icc [µA] 275 250 225 200 175 150 125 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-13. Idle mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 1600 -40 °C 25 °C 85 °C 1500 1400 1300 Icc [µA] 1200 1100 1000 900 800 700 600 500 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-14. Idle mode current vs. VCC. fSYS = 32MHz internal oscillator. 4500 -40 °C 4250 25 °C 85 °C 4000 Icc [µA] 3750 3500 3250 3000 2750 2500 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.
34.1.1.3 Power-down mode supply current Figure 34-15. Power-down mode supply current vs. VCC. All functions disabled. 1.8 85 °C 1.6 1.4 Icc [µA] 1.2 1 0.8 0.6 0.4 0.2 25 °C -40 °C 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-16. Power-down mode supply current vs. VCC. Watchdog and sampled BOD enabled. 3 85 °C 2.75 2.5 Icc[µA] 2.25 2 1.75 1.5 25 °C -40 °C 1.25 1 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-17. Power-down mode supply current vs. Temperature. All functions disabled. 1.8 1.6 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 1.6 V 1.4 Icc [µA] 1.2 1 0.8 0.6 0.4 0.2 0 -0.2 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-18. Power-down mode supply current vs. Temperature. Watchdog and sampled BOD enabled and running from internal ULP oscillator. 3 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 2.75 2.5 Icc [µA] 2.25 2 1.75 1.5 1.
34.1.2 I/O Pin Characteristics 34.1.2.1 Pull-up Figure 34-19. I/O pin pull-up resistor current vs. input voltage. VCC = 1.8V. 70 60 IPIN [µA] 50 40 30 20 -40 °C 25 °C 10 85 °C 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VPIN [V] Figure 34-20. I/O pin pull-up resistor current vs. input voltage. VCC = 3.0V. 120 108 96 IPIN [µA] 84 72 60 48 36 24 -40 °C 25 °C 85 °C 12 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.
Figure 34-21. I/O pin pull-up resistor current vs. input voltage. VCC = 3.3V. 140 120 IPIN [µA] 100 80 60 40 -40 °C 25 °C 85 °C 20 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.3 VPIN [V] 34.1.2.2 Output Voltage vs. Sink/Source Current Figure 34-22. I/O pin output voltage vs. source current. VCC = 1.8V. 2 1.8 1.6 VPIN [V] 1.4 -40 °C 1.2 1 0.8 0.6 85 °C 25 °C 0.4 0.2 0 -5 -4.5 -4 -3.5 -3 -2.5 -2 -1.5 -1 -0.
Figure 34-23. I/O pin output voltage vs. source current. VCC = 3.0V. 3.5 3 VPIN [V] 2.5 2 -40 °C 1.5 1 85 °C 25 °C 0.5 0 -16 -14 -12 -10 -8 -6 -4 -2 0 IPIN [mA] Figure 34-24. I/O pin output voltage vs. source current. VCC = 3.3V. 3.5 3 VPIN [V] 2.5 2 -40 °C 1.5 25 °C 1 85 °C 0.
Figure 34-25. I/O pin output voltage vs. sink current. VCC = 1.8V. 1.8 85 °C 1.6 1.4 VPIN [V] 1.2 1 0.8 25 °C 0.6 -40 °C 0.4 0.2 0 0 1 2 3 4 5 6 7 8 9 IPIN [mA] Figure 34-26. I/O pin output voltage vs. sink current. VCC = 3.0V. 1 85 °C VPIN [V] 0.9 0.8 25 °C 0.7 -40 °C 0.6 0.5 0.4 0.3 0.2 0.
Figure 34-27. I/O pin output voltage vs. sink current. VCC = 3.3V. 1.2 85 °C 1 25 °C -40 °C VPIN [V] 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 IPIN [mA] 34.1.2.3 Thresholds and Hysteresis Figure 34-28. I/O pin input threshold voltage vs. VCC. VIH I/O pin read as “1”. 1.8 -40°C 25°C 85°C 1.7 1.6 Vthreshold [V] 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-29. I/O pin input threshold voltage vs. VCC. VIL I/O pin read as “0”. 1.6 -40°C 25°C 85°C 1.5 1.4 Vthreshold [V] 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-30. I/O pin input hysteresis vs. VCC. 0.39 0.36 Vthreshold [V] 0.33 0.3 0.27 0.24 -40°C 25°C 85°C 0.21 0.18 0.15 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.1.3 ADC Characteristics Figure 34-31. INL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 1.6 1.4 INL[LSB] 1.2 Single-ended unsigned mode 1.0 0.8 0.6 Differential mode 0.4 Single-ended signed mode 0.2 0.0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VREF [V] Figure 34-32. INL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.70 0.65 Single-ended unsigned mode INL[LSB] 0.60 0.55 Differential mode 0.50 0.45 0.40 0.
Figure 34-33. INL error vs. input code. 1.25 1.00 0.75 INL[LSB] 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -1.25 0 512 1024 1536 2048 2560 3072 3584 4096 ADC input code Figure 34-34. DNL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 0.70 0.65 0.60 Single-ended unsigned mode DNL [LSB] 0.55 0.50 0.45 0.40 Differential mode 0.35 Single-ended signed mode 0.30 0.25 0.20 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-35. DNL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.60 0.55 Single-ended unsigned mode DNL [LSB] 0.50 0.45 0.40 Differential mode 0.35 0.30 Single-ended signed mode 0.25 0.20 50 100 150 200 250 300 ADC sample rate [ksps] Figure 34-36. DNL error vs. input code. 1 DNL [LSB] 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.
Figure 34-37. Gain error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. -5 Gain error [mV] -6 -7 Differential mode -8 -9 Single-ended signed mode -10 -11 -12 Single-ended unsigned mode -13 -14 -15 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.4 3.6 VREF [V] Figure 34-38. Gain error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. -2 Gain error [mV] -3 -4 Differential mode -5 Single-ended signed mode -6 Single-ended unsigned mode -7 -8 -9 1.6 1.
Figure 34-39. Offset error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. 9.4 9.2 Offset error [mV] 9.0 8.8 Differential mode 8.6 8.4 8.2 8.0 7.8 7.6 7.4 7.2 7.0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VREF [V] Figure 34-40. Gain error vs. temperature. VCC = 3.0V, VREF = external 2.0V.
Figure 34-41. Offset error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. 8.00 Offset error [mV] 7.00 6.00 5.00 Differential mode 4.00 3.00 2.00 1.00 0.00 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VCC [V] 34.1.4 Analog Comparator Characteristics Figure 34-42. Analog comparator hysteresis vs. VCC. Small hysteresis. 19 18 85°C VHYST [mV] 17 16 25°C 15 14 -40°C 13 12 11 10 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-43. Analog comparator hysteresis vs. VCC. Large hysteresis. 36 85°C 34 VHYST [mV] 32 25°C 30 28 -40°C 26 24 22 20 18 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-44. Analog comparator current source vs. calibration value. VCC = 3.0V. 8 ICURRENTSOURCE [µA] 7 6 5 4 3.3 V 3.0 V 2.7 V 3 2.2 V 1.8 V 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CURRCALIBA[3..
Figure 34-45. Voltage scaler INL vs. SCALEFAC. T = 25C, VCC = 3.0V. 0.425 0.4 INL [LSB] 0.375 25°C 0.35 0.325 0.3 0.275 0.25 0 5 10 15 20 25 30 35 40 45 50 55 60 65 SCALEFAC 34.1.5 Internal 1.0V reference Characteristics Figure 34-46. ADC Internal 1.0V reference vs. temperature. 1.004 1.8 V 2.7 V Bandgap Voltage [V] 1.002 1 3.0 V 0.998 0.996 0.994 0.992 0.99 0.988 0.
34.1.6 BOD Characteristics Figure 34-47. BOD thresholds vs. temperature. BOD level = 1.6V. 1.626 1.624 VBOT [V] 1.622 1.62 1.618 1.616 1.614 1.612 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 35 45 55 65 75 85 Temperature [ °C] Figure 34-48. BOD thresholds vs. temperature. BOD level = 3.0V. 3.09 3.08 VBOT [V] 3.07 3.06 3.05 3.04 3.03 3.
34.1.7 External Reset Characteristics Figure 34-49. Minimum Reset pin pulse width vs. VCC. 140 135 130 125 t RST [ns] 120 115 110 105 100 85°C 95 25°C -40°C 90 85 80 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-50. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 1.8V. 80 70 IRESET [µA] 60 50 40 30 20 -40°C 25°C 85°C 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.
Figure 34-51. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.0V. 120 108 96 IRESET [µA] 84 72 60 48 36 24 -40°C 25°C 85°C 12 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VRESET [V] Figure 34-52. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.3V. 140 120 IRESET [µA] 100 80 60 40 -40°C 25°C 85°C 20 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.
Figure 34-53. Reset pin input threshold voltage vs. VCC. VIH - Reset pin read as “1”. 1.8 85°C 25°C -40°C 1.6 V THRESHOLD [V] 1.4 1.2 1 0.8 0.6 0.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] 34.1.8 Oscillator Characteristics 34.1.8.1 Ultra Low-Power internal oscillator Figure 34-54. Ultra Low-Power internal oscillator frequency vs. temperature. 36.0 35.5 Frequency [kHz] 35.0 34.5 34.0 33.5 33.0 3.6V 3.0V 2.7V 1.6V 32.5 32.0 31.5 31.
32.768kHz Internal Oscillator Figure 34-55. 32.768kHz internal oscillator frequency vs. temperature. 32.8 1.6 V 1.8 V 2.2 V 2.7 V 3.6 V 3.0 V 3.3 V Frequency [kHz] 32.75 32.7 32.65 32.6 32.55 32.5 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-56. 32.768kHz internal oscillator frequency vs. calibration value. VCC = 3.0V, T = 25°C. 50 3.0 V 47 44 Frequency [kHz] 34.1.8.
34.1.8.3 2MHz Internal Oscillator Figure 34-57. 2MHz internal oscillator frequency vs. temperature. DFLL disabled. 2.14 2.12 Frequency [MHz] 2.1 2.08 2.06 2.04 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 1.6V 2.02 2 1.98 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-58. 2MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 2.005 1.8 V 1.6 V 2.2 V 2.7 V 3.0 V 3.3 V 3.6 V 2.0025 Frequency [MHz] 2 1.9975 1.995 1.9925 1.99 1.
Figure 34-59. 2MHz internal oscillator frequency vs. CALA calibration value. VCC = 3V. Frequency [MHz] 2.5 2.4 -40 °C 2.3 25 °C 2.2 85 °C 2.1 2 1.9 1.8 1.7 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 128 CALA 34.1.8.4 32MHz Internal Oscillator Figure 34-60. 32MHz internal oscillator frequency vs. temperature. DFLL disabled. 36 35.5 Frequency [MHz] 35 34.5 34 33.5 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 1.6 V 33 32.5 32 31.
Figure 34-61. 32MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 32.04 1.6 V 1.8 V 2.2 V 2.7 V 3.0 V 3.6 V 3.3 V 32.01 Frequency [MHz] 31.98 31.95 31.92 31.89 31.86 31.83 31.8 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-62. 32MHz internal oscillator CALA calibration step size. VCC = 3.0V. 0.25 0.24 0.23 Step Size [%] 0.22 0.21 0.2 0.19 -40°C 0.18 0.17 25°C 0.16 85°C 0.15 0.14 0.13 0.
Figure 34-63. 32MHz internal oscillator frequency vs. CALB calibration value. VCC = 3.0V. 70 25 °C -40 °C 85 °C 65 Frequency [MHz] 60 55 50 45 40 35 30 25 20 0 7 14 21 28 35 42 49 56 63 CALB 34.1.8.5 32MHz internal oscillator calibrated to 48MHz Figure 34-64. 48MHz internal oscillator frequency vs. temperature. DFLL disabled. 54 Frequency [MHz] 53 52 51 50 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 1.
Figure 34-65. 48MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 48.1 1.8 V 1.6 V 2.2 V 3.0 V 2.7 V 3.6 V Frequency [MHz] 48.05 48 47.95 3.3 V 47.9 47.85 47.8 47.75 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.1.9 Two-Wire Interface characteristics Figure 34-66. SDA hold time vs. temperature.
Figure 34-67. SDA hold time vs. supply voltage. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VCC [V] 34.1.10 PDI characteristics Figure 34-68. Maximum PDI frequency vs. VCC. 23 -40°C 21 fMAX [MHz] 19 25°C 85°C 17 15 13 11 9 7 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.2 ATxmega64C3 34.2.1 Current consumption 34.2.1.1 Active mode supply current Figure 34-69.Active supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 800 3.6 V IccV [µA ] 700 3.3 V 600 3.0 V 500 2.7 V 400 2.2 V 300 1.8 V 1.6 V 200 100 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency [MHz] Figure 34-70.Active supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 12 3.6 V 10 3.3 V Icc [mA] 8 3.0 V 2.7 V 6 4 2.2 V 1.8 V 2 1.
Figure 34-71.Active mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 250 -40 °C Icc[µA] 225 200 25 °C 175 85 °C 150 125 100 75 50 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-72.Active mode supply current vs. VCC. fSYS = 1MHz external clock. Icc [µA] 900 800 -40 °C 25 °C 700 85 °C 600 500 400 300 200 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-73.Active mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 1400 1300 -40 °C 25 °C 85 °C 1200 1100 Icc [µA] 1000 900 800 700 600 500 400 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-74.Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 5.0 -40 °C 25 °C 85 °C 4.5 Icc [mA] 4.0 3.5 3.0 2.5 2.0 1.5 1.0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-75.Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator. 12 -40 °C 11 25 °C Icc [mA] 10 85 °C 9 8 7 6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 VCC [V] 34.2.1.2 Idle mode supply current Figure 34-76.Idle mode supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 140 3.6 V 120 3.3 V 100 Icc [µA] 3.0 V 80 2.7 V 60 2.2 V 40 1.8 V 1.6 V 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.
Figure 34-77.Idle mode supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 4.5 4.0 3.6 V Icc [mA] 3.5 3.3 V 3.0 3.0 V 2.5 2.7 V 2.0 1.5 2.2 V 1.0 1.8 V 0.5 1.6 V 0 0 4 8 12 16 20 24 28 32 Frequency [MHz] Figure 34-78. Idle mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 32 31.5 -40 °C 85 °C 31 Icc[µA ] 30.5 25 °C 30 29.5 29 28.5 28 27.5 27 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-79. Idle mode supply current vs. VCC. fSYS = 1MHz external clock. 130 85 °C 25 °C -40 °C 120 110 Icc [µA] 100 90 80 70 60 50 40 30 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-80. Idle mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 350 -40 °C 25 °C 85 °C 325 300 Icc [µA] 275 250 225 200 175 150 125 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-81. Idle mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 1600 -40 °C 25 °C 85 °C 1500 1400 1300 Icc [µA] 1200 1100 1000 900 800 700 600 500 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-82. Idle mode current vs. VCC. fSYS = 32MHz internal oscillator. 4500 -40 °C 4250 25 °C 85 °C 4000 Icc [µA] 3750 3500 3250 3000 2750 2500 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.
34.2.1.3 Power-down mode supply current Figure 34-83. Power-down mode supply current vs. VCC. All functions disabled. 1.8 85 °C 1.6 1.4 Icc [µA] 1.2 1 0.8 0.6 0.4 0.2 25 °C -40 °C 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-84. Power-down mode supply current vs. VCC. Watchdog and sampled BOD enabled. 3 85 °C 2.75 2.5 Icc[µA] 2.25 2 1.75 1.5 25 °C -40 °C 1.25 1 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-85. Power-down mode supply current vs. Temperature. All functions disabled. 1.8 1.6 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 1.6 V 1.4 Icc [µA] 1.2 1 0.8 0.6 0.4 0.2 0 -0.2 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-86. Power-down mode supply current vs. Temperature. Watchdog and sampled BOD enabled and running from internal ULP oscillator. 3 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 2.75 2.5 Icc [µA] 2.25 2 1.75 1.5 1.
34.2.2 I/O Pin Characteristics 34.2.2.1 Pull-up Figure 34-87. I/O pin pull-up resistor current vs. input voltage. VCC = 1.8V. 70 60 IPIN [µA] 50 40 30 20 -40 °C 25 °C 10 85 °C 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VPIN [V] Figure 34-88. I/O pin pull-up resistor current vs. input voltage. VCC = 3.0V. 120 108 96 IPIN [µA] 84 72 60 48 36 24 -40 °C 25 °C 85 °C 12 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.
Figure 34-89. I/O pin pull-up resistor current vs. input voltage. VCC = 3.3V. 140 120 IPIN [µA] 100 80 60 40 -40 °C 25 °C 85 °C 20 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.3 VPIN [V] 34.2.2.2 Output Voltage vs. Sink/Source Current Figure 34-90. I/O pin output voltage vs. source current. VCC = 1.8V. 2 1.8 1.6 VPIN [V] 1.4 -40 °C 1.2 1 0.8 0.6 85 °C 25 °C 0.4 0.2 0 -5 -4.5 -4 -3.5 -3 -2.5 -2 -1.5 -1 -0.
Figure 34-91. I/O pin output voltage vs. source current. VCC = 3.0V. 3.5 3 VPIN [V] 2.5 2 -40 °C 1.5 1 85 °C 25 °C 0.5 0 -16 -14 -12 -10 -8 -6 -4 -2 0 IPIN [mA] Figure 34-92. I/O pin output voltage vs. source current. VCC = 3.3V. 3.5 3 VPIN [V] 2.5 2 -40 °C 1.5 25 °C 1 85 °C 0.
Figure 34-93. I/O pin output voltage vs. sink current. VCC = 1.8V. 1.8 85 °C 1.6 1.4 VPIN [V] 1.2 1 0.8 25 °C 0.6 -40 °C 0.4 0.2 0 0 1 2 3 4 5 6 7 8 9 IPIN [mA] Figure 34-94. I/O pin output voltage vs. sink current. VCC = 3.0V. 1 85 °C VPIN [V] 0.9 0.8 25 °C 0.7 -40 °C 0.6 0.5 0.4 0.3 0.2 0.
Figure 34-95. I/O pin output voltage vs. sink current. VCC = 3.3V. 1.2 85 °C 1 25 °C -40 °C VPIN [V] 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 IPIN [mA] 34.2.2.3 Thresholds and Hysteresis Figure 34-96. I/O pin input threshold voltage vs. VCC. VIH I/O pin read as “1”. 1.8 -40°C 25°C 85°C 1.7 1.6 Vthreshold [V] 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-97. I/O pin input threshold voltage vs. VCC. VIL I/O pin read as “0”. 1.6 -40°C 25°C 85°C 1.5 1.4 Vthreshold [V] 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-98. I/O pin input hysteresis vs. VCC. 0.39 0.36 Vthreshold [V] 0.33 0.3 0.27 0.24 -40°C 25°C 85°C 0.21 0.18 0.15 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.2.3 ADC Characteristics Figure 34-99. INL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 1.6 1.4 INL[LSB] 1.2 Single-ended unsigned mode 1.0 0.8 0.6 Differential mode 0.4 Single-ended signed mode 0.2 0.0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VREF [V] Figure 34-100. INL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.70 0.65 Single-ended unsigned mode INL[LSB] 0.60 0.55 Differential mode 0.50 0.45 0.40 0.
Figure 34-101. INL error vs. input code. 1.25 1.00 0.75 INL[LSB] 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -1.25 0 512 1024 1536 2048 2560 3072 3584 4096 ADC input code Figure 34-102. DNL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 0.70 0.65 0.60 Single-ended unsigned mode DNL [LSB] 0.55 0.50 0.45 0.40 Differential mode 0.35 Single-ended signed mode 0.30 0.25 0.20 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-103. DNL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.60 0.55 Single-ended unsigned mode DNL [LSB] 0.50 0.45 0.40 Differential mode 0.35 0.30 Single-ended signed mode 0.25 0.20 50 100 150 200 250 300 ADC sample rate [ksps] Figure 34-104. DNL error vs. input code. 1 DNL [LSB] 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.
Figure 34-105. Gain error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. -5 Gain error [mV] -6 -7 Differential mode -8 -9 Single-ended signed mode -10 -11 -12 Single-ended unsigned mode -13 -14 -15 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.4 3.6 VREF [V] Figure 34-106. Gain error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. -2 Gain error [mV] -3 -4 Differential mode -5 Single-ended signed mode -6 Single-ended unsigned mode -7 -8 -9 1.
Figure 34-107. Offset error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. 9.4 9.2 Offset error [mV] 9.0 8.8 Differential mode 8.6 8.4 8.2 8.0 7.8 7.6 7.4 7.2 7.0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VREF [V] Figure 34-108. Gain error vs. temperature. VCC = 3.0V, VREF = external 2.0V.
Figure 34-109. Offset error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. 8.00 Offset error [mV] 7.00 6.00 5.00 Differential mode 4.00 3.00 2.00 1.00 0.00 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VCC [V] 34.2.4 Analog Comparator Characteristics Figure 34-110. Analog comparator hysteresis vs. VCC. Small hysteresis. 19 18 85°C VHYST [mV] 17 16 25°C 15 14 -40°C 13 12 11 10 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-111. Analog comparator hysteresis vs. VCC. Large hysteresis. 36 85°C 34 VHYST [mV] 32 25°C 30 28 -40°C 26 24 22 20 18 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-112. Analog comparator current source vs. calibration value. VCC = 3.0V. 8 ICURRENTSOURCE [µA] 7 6 5 4 3.3 V 3.0 V 2.7 V 3 2.2 V 1.8 V 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CURRCALIBA[3..
Figure 34-113. Voltage scaler INL vs. SCALEFAC. T = 25C, VCC = 3.0V. 0.425 0.4 INL [LSB] 0.375 25°C 0.35 0.325 0.3 0.275 0.25 0 5 10 15 20 25 30 35 40 45 50 55 60 65 SCALEFAC 34.2.5 Internal 1.0V reference Characteristics Figure 34-114. ADC Internal 1.0V reference vs. temperature. 1.004 1.8 V 2.7 V Bandgap Voltage [V] 1.002 1 3.0 V 0.998 0.996 0.994 0.992 0.99 0.988 0.
34.2.6 BOD Characteristics Figure 34-115. BOD thresholds vs. temperature. BOD level = 1.6V. 1.626 1.624 VBOT [V] 1.622 1.62 1.618 1.616 1.614 1.612 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 35 45 55 65 75 85 Temperature [ °C] Figure 34-116. BOD thresholds vs. temperature. BOD level = 3.0V. 3.09 3.08 VBOT [V] 3.07 3.06 3.05 3.04 3.03 3.
34.2.7 External Reset Characteristics Figure 34-117. Minimum Reset pin pulse width vs. VCC. 140 135 130 125 t RST [ns] 120 115 110 105 100 85°C 95 25°C -40°C 90 85 80 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-118. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 1.8V. 80 70 IRESET [µA] 60 50 40 30 20 -40°C 25°C 85°C 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.
Figure 34-119. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.0V. 120 108 96 IRESET [µA] 84 72 60 48 36 24 -40°C 25°C 85°C 12 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VRESET [V] Figure 34-120. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.3V. 140 120 IRESET [µA] 100 80 60 40 -40°C 25°C 85°C 20 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.
Figure 34-121. Reset pin input threshold voltage vs. VCC. VIH - Reset pin read as “1”. 1.8 85°C 25°C -40°C 1.6 V THRESHOLD [V] 1.4 1.2 1 0.8 0.6 0.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] 34.2.8 Oscillator Characteristics 34.2.8.1 Ultra Low-Power internal oscillator Figure 34-122. Ultra Low-Power internal oscillator frequency vs. temperature. 36.0 35.5 Frequency [kHz] 35.0 34.5 34.0 33.5 33.0 3.6V 3.0V 2.7V 1.6V 32.5 32.0 31.5 31.
32.768kHz Internal Oscillator Figure 34-123. 32.768kHz internal oscillator frequency vs. temperature. 32.8 1.6 V 1.8 V 2.2 V 2.7 V 3.6 V 3.0 V 3.3 V Frequency [kHz] 32.75 32.7 32.65 32.6 32.55 32.5 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-124. 32.768kHz internal oscillator frequency vs. calibration value. VCC = 3.0V, T = 25°C. 50 3.0 V 47 44 Frequency [kHz] 34.2.8.
34.2.8.3 2MHz Internal Oscillator Figure 34-125. 2MHz internal oscillator frequency vs. temperature. DFLL disabled. 2.14 2.12 Frequency [MHz] 2.1 2.08 2.06 2.04 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 1.6V 2.02 2 1.98 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-126. 2MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 2.005 1.8 V 1.6 V 2.2 V 2.7 V 3.0 V 3.3 V 3.6 V 2.0025 Frequency [MHz] 2 1.9975 1.995 1.9925 1.
Figure 34-127. 2MHz internal oscillator frequency vs. CALA calibration value. VCC = 3V. Frequency [MHz] 2.5 2.4 -40 °C 2.3 25 °C 2.2 85 °C 2.1 2 1.9 1.8 1.7 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 128 CALA 34.2.8.4 32MHz Internal Oscillator Figure 34-128. 32MHz internal oscillator frequency vs. temperature. DFLL disabled. 36 35.5 Frequency [MHz] 35 34.5 34 33.5 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 1.6 V 33 32.5 32 31.
Figure 34-129. 32MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 32.04 1.6 V 1.8 V 2.2 V 2.7 V 3.0 V 3.6 V 3.3 V 32.01 Frequency [MHz] 31.98 31.95 31.92 31.89 31.86 31.83 31.8 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-130. 32MHz internal oscillator CALA calibration step size. VCC = 3.0V. 0.25 0.24 0.23 Step Size [%] 0.22 0.21 0.2 0.19 -40°C 0.18 0.17 25°C 0.16 85°C 0.15 0.14 0.13 0.
Figure 34-131. 32MHz internal oscillator frequency vs. CALB calibration value. VCC = 3.0V. 70 25 °C -40 °C 85 °C 65 Frequency [MHz] 60 55 50 45 40 35 30 25 20 0 7 14 21 28 35 42 49 56 63 CALB 34.2.8.5 32MHz internal oscillator calibrated to 48MHz Figure 34-132. 48MHz internal oscillator frequency vs. temperature. DFLL disabled. 54 Frequency [MHz] 53 52 51 50 3.6 V 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 1.
Figure 34-133. 48MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 48.1 1.8 V 1.6 V 2.2 V 3.0 V 2.7 V 3.6 V Frequency [MHz] 48.05 48 47.95 3.3 V 47.9 47.85 47.8 47.75 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.2.9 Two-Wire Interface characteristics Figure 34-134. SDA hold time vs. temperature.
Figure 34-135. SDA hold time vs. supply voltage. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VCC [V] 34.2.10 PDI characteristics Figure 34-136. Maximum PDI frequency vs. VCC. 23 -40°C 21 fMAX [MHz] 19 25°C 85°C 17 15 13 11 9 7 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.3 ATxmega128C3 34.3.1 Current consumption 34.3.1.1 Active mode supply current Figure 34-137. Active supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 800 Icc [µA] 700 3.6V 600 3.3V 500 3.0V 2.7V 400 2.2V 300 1.8V 200 100 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency [MHz] Figure 34-138. Active supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 12 3.6V 10 3.3V 3.0V Icc [mA] 8 2.7V 6 4 2.2V 1.
Figure 34-139. Active mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. Icc [µA] 300 250 -40°C 200 25°C 85°C 150 100 50 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-140. Active mode supply current vs. VCC. fSYS = 1MHz external clock. 800 -40°C 25°C 85°C 700 Icc [µA] 600 500 400 300 200 100 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-141. Active mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 1600 -40°C 25°C 85°C 1400 1200 Icc [µA] 1000 800 600 400 200 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-142. Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 6 -40°C 25°C 85°C 5 Icc [mA] 4 3 2 1 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-143. Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator. 13 -40°C 12 25°C 85°C 11 Icc [mA] 10 9 8 7 6 5 4 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] 34.3.1.2 Idle mode supply current Figure 34-144. Idle mode supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 140 3.6V 120 3.3V Icc [µA] 100 3.0V 80 2.7V 60 2.2V 1.8V 40 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.
Figure 34-145. Idle mode supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. Icc [mA] 4.5 4.0 3.6V 3.5 3.3V 3.0 3.0V 2.5 2.7V 2.0 1.5 2.2V 1.0 1.8V 0.5 0 0 4 8 12 16 20 24 28 32 Frequency [MHz] Figure 34-146. Idle mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 32 85°C 31 -40°C 30 25°C Icc [µA] 29 28 27 26 25 24 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-147. Idle mode supply current vs. VCC. fSYS = 1MHz external clock. 140 85°C 25°C -40°C 120 Icc [µA] 100 80 60 40 20 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-148. Idle mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 400 85°C 350 25°C -40°C Icc [µA] 300 250 200 150 100 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-149. Idle mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 1800 -40°C 25°C 85°C 1600 Icc [µA] 1400 1200 1000 800 600 400 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-150. Idle mode current vs. VCC. fSYS = 32MHz internal oscillator. 5.0 -40°C Icc [mA] 4.5 25°C 85°C 4.0 3.5 3.0 2.5 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.
34.3.1.3 Power-down mode supply current Figure 34-151. Power-down mode supply current vs. VCC. All functions disabled. 2.5 85°C Icc [µA] 2 1.5 1 0.5 25°C -40°C 0 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-152. Power-down mode supply current vs. VCC. Watchdog and sampled BOD enabled. 3.4 85°C 3.1 2.8 Icc[µA] 2.5 2.2 1.9 1.6 25°C 1.3 -40°C 1 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-153. Power-down mode supply current vs. Temperature. Watchdog and sampled BOD enabled and running from internal ULP oscillator. 3.4 3.0 V Icc [µA] 3.1 2.7 V 2.8 2.2 V 2.5 1.8 V 2.2 1.9 1.6 1.3 1 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.3.2 I/O Pin Characteristics 34.3.2.1 Pull-up Figure 34-154. I/O pin pull-up resistor current vs. input voltage. VCC = 1.8V. 70 60 I CC [µA] 50 40 30 20 -40°C 10 25°C 85°C 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.
Figure 34-155. I/O pin pull-up resistor current vs. input voltage. VCC = 3.0V. 120 100 ICC [µA] 80 60 40 -40°C 25°C 20 85°C 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VPIN [V] Figure 34-156. I/O pin pull-up resistor current vs. input voltage. VCC = 3.3V. 140 120 I CC [µA] 100 80 60 -40°C 40 25°C 20 85°C 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.
34.3.2.2 Output Voltage vs. Sink/Source Current Figure 34-157. I/O pin output voltage vs. source current. VCC = 1.8V. 2.0 1.8 1.6 V PIN [V] 1.4 1.2 -40 °C 1.0 0.8 25 °C 0.6 85 °C 0.4 0.2 0 -5 -4.5 -4 -3.5 -3 -2.5 -2 -1.5 -1 -0.5 0 IPIN [mA] Figure 34-158. I/O pin output voltage vs. source current. VCC = 3.0V. 3.5 3 V PIN [V] 2.5 2 -40 °C 1.5 25 °C 1 85 °C 0.
Figure 34-159. I/O pin output voltage vs. source current. VCC = 3.3V. 3.5 3 V PIN [V] 2.5 2 -40 °C 1.5 25 °C 1 85 °C 0.5 0 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 IPIN [mA] Figure 34-160. I/O pin output voltage vs. sink current. VCC = 1.8V. 2.0 1.8 85°C 1.6 V PIN [V] 1.4 1.2 1.0 0.8 25°C 0.6 -40°C 0.4 0.
Figure 34-161. I/O pin output voltage vs. sink current. VCC = 3.0V. 1.2 1 85°C 25°C V PIN [V] 0.8 -40°C 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 IPIN [mA] Figure 34-162. I/O pin output voltage vs. sink current. VCC = 3.3V. 1.4 1.2 85°C 1 25°C V PIN [V] -40°C 0.8 0.6 0.4 0.
34.3.2.3 Thresholds and Hysteresis Figure 34-163. I/O pin input threshold voltage vs. VCC. VIH I/O pin read as “1”. 2 -40°C Vthreshold [V] 1.8 25°C 85°C 1.6 1.4 1.2 1 0.8 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-164. I/O pin input threshold voltage vs. VCC. VIL I/O pin read as “0”. 1.7 -40°C 25°C 85°C Vthreshold [V] 1.5 1.3 1.1 0.9 0.7 0.5 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-165. I/O pin input hysteresis vs. VCC. 0.4 0.375 0.35 Vthreshold [V] 0.325 0.3 0.275 0.25 -40°C 0.225 25°C 0.2 85°C 0.175 0.15 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 2.4 2.6 2.8 3.0 VCC [V] 34.3.3 ADC Characteristics Figure 34-166. INL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 1.6 1.4 INL[LSB] 1.2 Single-ended unsigned mode 1.0 0.8 0.6 Differential mode 0.4 Single-ended signed mode 0.2 0.0 1.0 1.2 1.4 1.6 1.8 2.0 2.
Figure 34-167. INL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.70 0.65 Single-ended unsigned mode INL[LSB] 0.60 0.55 Differential mode 0.50 0.45 0.40 0.35 Single-ended signed mode 0.30 0.25 50 100 150 200 250 300 ADC sample rate [ksps] Figure 34-168. INL error vs. input code. 1.25 1.00 0.75 INL[LSB] 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -1.
Figure 34-169. DNL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 0.70 0.65 0.60 Single-ended unsigned mode DNL [LSB] 0.55 0.50 0.45 0.40 Differential mode 0.35 Single-ended signed mode 0.30 0.25 0.20 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VREF [V] Figure 34-170. DNL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.60 0.55 Single-ended unsigned mode DNL [LSB] 0.50 0.45 0.40 Differential mode 0.35 0.30 Single-ended signed mode 0.25 0.
Figure 34-171. DNL error vs. input code. 1 DNL [LSB] 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 0 512 1024 1536 2048 2560 3072 3584 4096 ADC input code Figure 34-172. Gain error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. -5 Gain error [mV] -6 -7 Differential mode -8 -9 Single-ended signed mode -10 -11 -12 Single-ended unsigned mode -13 -14 -15 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-173. Gain error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. -2 Gain error [mV] -3 -4 Differential mode -5 Single-ended signed mode -6 Single-ended unsigned mode -7 -8 -9 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VCC [V] Figure 34-174. Offset error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. 9.4 9.2 Offset error [mV] 9.0 8.8 Differential mode 8.6 8.4 8.2 8.0 7.8 7.6 7.4 7.2 7.0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-175. Gain error vs. temperature. VCC = 3.0V, VREF = external 2.0V. -3 Gain error [mV] -4 -5 Single-ended signed mode -6 -7 Differential mode -8 -9 -10 Single-ended unsigned mode -11 -12 -13 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-176. Offset error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. 8.00 Offset error [mV] 7.00 6.00 5.00 Differential mode 4.00 3.00 2.00 1.00 0.00 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.
34.3.4 Analog Comparator Characteristics Figure 34-177. Analog comparator hysteresis vs. VCC. Small hysteresis. 19 18 85°C VHYST [mV] 17 16 25°C 15 14 -40°C 13 12 11 10 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-178. Analog comparator hysteresis vs. VCC. Large hysteresis. 36 85°C 34 VHYST [mV] 32 25°C 30 28 -40°C 26 24 22 20 18 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-179. Analog comparator current source vs. calibration value. VCC = 3.0V. 7 ICURRENTSOURCE [µA] 6.5 6 5.5 5 4.5 -40°C 25°C 85°C 4 3.5 3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CURRCALIBA[3..0] Figure 34-180. Voltage scaler INL vs. SCALEFAC. T = 25C, VCC = 3.0V. 0.6 0.55 25°C 0.5 INL[LSB] 0.45 0.4 0.35 0.3 0.25 0.2 0.
34.3.5 Internal 1.0V reference Characteristics Figure 34-181. ADC Internal 1.0V reference vs. temperature. 1.007 1.006 Bandgap Voltage [V] 1.005 1.004 1.003 1.002 1.6V 1.001 1.000 2.7V 0.999 3.6V 0.998 0.997 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [ ° C] 34.3.6 BOD Characteristics Figure 34-182. BOD thresholds vs. temperature. BOD level = 1.6V. 1.596 1.594 Rising Vcc VBOT [V] 1.592 1.59 1.588 1.586 Falling Vcc 1.584 1.
Figure 34-183. BOD thresholds vs. temperature. BOD level = 3.0V. 3.05 Rising Vcc 3.04 V BOT [V] 3.03 3.02 3.01 Falling Vcc 3 2.99 2.98 0 10 20 30 40 50 60 70 80 Temperature [°C] 34.3.7 External Reset Characteristics Figure 34-184. Minimum Reset pin pulse width vs. VCC. 140 135 130 125 t RST [ns] 120 115 110 105 85°C 100 25°C 95 -40°C 90 85 80 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-185. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 1.8V. 80 70 IRESET [µA] 60 50 40 30 -40°C 25°C 20 85°C 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VRESET [V] Figure 34-186. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.0V. 140 120 IRESET [µA] 100 80 60 40 -40°C 25°C 85°C 20 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.
Figure 34-187. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.3V. 140 120 IRESET [µA] 100 80 60 40 -40°C 25°C 85°C 20 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.3 VRESET [V] Figure 34-188. Reset pin input threshold voltage vs. VCC. VIH - Reset pin read as “1”. 1.8 85°C 25°C -40 °C 1.6 VTHRESHOLD [V] 1.4 1.2 1 0.8 0.6 0.4 0.2 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.3.8 Oscillator Characteristics 34.3.8.1 Ultra Low-Power internal oscillator Figure 34-189. Ultra Low-Power internal oscillator frequency vs. temperature. 36 35.5 Frequency [MHz] 35 34.5 34 33.5 3.6V 3.3V 33 3.0V 2.7V 1.8V 32.5 32 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.3.8.2 32.768kHz Internal Oscillator Figure 34-190. 32.768kHz internal oscillator frequency vs. temperature. 1.8V 2.2V 2.7V 3.0V 3.3V 3.6V 32.8 32.75 Frequency [kHz] 32.7 32.65 32.6 32.
Figure 34-191. 32.768kHz internal oscillator frequency vs. calibration value. VCC = 3.0V, T = 25°C. 50 3.0V 47 Frequency [kHz] 44 41 38 35 32 29 26 23 20 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 RC32KCAL[7..0] 34.3.8.3 2MHz Internal Oscillator Figure 34-192. 2MHz internal oscillator frequency vs. temperature. DFLL disabled. 2.16 2.14 Frequency [MHz] 2.12 2.1 2.08 2.06 2.04 3.3V 3.0V 2.02 2 2.7V 1.98 2.2V 1.8V 1.
Frequency [MHz] Figure 34-193. 2MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator . 2.005 1.8V 2.2V 2 2.7V 3.0V 1.995 3.3V 1.99 1.985 1.98 1.975 1.97 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-194. 2MHz internal oscillator frequency vs. CALA calibration value. VCC = 3V. Frequecncy[MHz] 2.5 2.4 -40°C 2.3 25°C 2.2 85°C 2.1 2 1.9 1.8 1.
34.3.8.4 32MHz Internal Oscillator Figure 34-195. 32MHz internal oscillator frequency vs. temperature. DFLL disabled. 35.5 35 Frequency [MHz] 34.5 34 33.5 33 3.3V 3.0V 32.5 2.7V 2.2V 1.8V 32 31.5 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-196. 32MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 32.1 1.8V 2.2V 32.05 Frequency [MHz] 32 2.7V 3.0V 3.3V 31.95 31.9 31.85 31.8 31.75 31.7 31.65 31.
Figure 34-197. 32MHz internal oscillator CALA calibration step size. VCC = 3.0V. 0.28 0.26 Step size [%] 0.24 0.22 0.20 -40°C 25°C 0.18 0.16 85°C 0.14 0.12 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 CALA Figure 34-198. 32MHz internal oscillator frequency vs. CALB calibration value. VCC = 3.0V.
34.3.8.5 32MHz internal oscillator calibrated to 48MHz Figure 34-199. 48MHz internal oscillator frequency vs. temperature. DFLL disabled. 54 Frequency [MHz] 53 52 51 50 3.6V 49 3.3V 48 3.0V 47 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 2.7V 1.8V Temperature [°C] Figure 34-200. 48MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 48.1 1.8V 2.7V 3.0V 3.3V 3.6V 48 Frequency [MHz] 47.9 47.8 47.7 47.6 47.5 47.4 47.3 47.
34.3.9 Two-Wire Interface characteristics Figure 34-201. SDA hold time vs. temperature. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-202. SDA hold time vs. supply voltage. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.
34.3.10 PDI characteristics Figure 34-203. Maximum PDI frequency vs. VCC. 23 -40°C 21 fMAX [MHz] 19 25°C 85°C 17 15 13 11 9 7 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.4 ATxmega192C3 34.4.1 Current consumption 34.4.1.1 Active mode supply current Figure 34-204.Active supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 650 3.3V ICC [µA] 600 550 3.0V 500 450 2.7V 400 350 300 250 2.2V 1.8V 200 150 100 50 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency [MHz] Figure 34-205.Active supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 11 10 3.3V 9 3.0V ICC [mA] 8 2.7V 7 6 5 4 2.2V 3 2 1.
Figure 34-206.Active mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 270 -40°C 240 25°C 210 ICC [µA] 85°C 180 150 120 90 60 30 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-207.Active mode supply current vs. VCC. fSYS = 1MHz external clock. 750 -40°C 25°C 85°C 700 650 ICC [µA] 600 550 500 450 400 350 300 250 200 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-208.Active mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 1500 -40°C 25°C 85°C 1400 1300 ICC [mA] 1200 1100 1000 900 800 700 600 500 400 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-209.Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 6.0 5.5 -40°C 25°C 85°C 5.0 ICC [mA] 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-210.Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator. 14 -40°C 13 25°C 12 ICC [mA] 85°C 11 10 9 8 7 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 VCC [V] 34.4.1.2 Idle mode supply current Figure 34-211.Idle mode supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 130 3.3V ICC [µA] 117 104 3.0V 91 2.7V 78 65 2.2V 52 1.8V 39 26 13 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.
Figure 34-212.Idle mode supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 4.0 3.3V 3.5 3.0V ICC [mA] 3.0 2.7V 2.5 2.0 1.5 2.2V 1.0 1.8V 0.5 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 Frequency [MHz] Figure 34-213.Idle mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 33 85°C 32 31 ICC [µA] -40°C 30 25°C 29 28 27 26 25 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-214.Idle mode supply current vs. VCC. fSYS = 1MHz external clock. 160 85°C 25°C -40°C 140 ICC [µA] 120 100 80 60 40 20 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-215.Idle mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 390 -40°C 25°C 85°C 360 ICC [µA] 330 300 270 240 210 180 150 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-216.Idle mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 2000 -40°C 25°C 85°C 1800 ICC [µA] 1600 1400 1200 1000 800 600 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-217.Idle mode current vs. VCC. fSYS = 32MHz internal oscillator. 5.50 -40°C 5.25 25°C 5.00 85°C ICC [mA] 4.75 4.50 4.25 4.00 3.75 3.50 3.25 3.00 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.
34.4.1.3 Power-down mode supply current Figure 34-218.Power-down mode supply current vs. VCC. All functions disabled. 4.5 85°C 4 3.5 ICC [µA] 3 2.5 2 1.5 1 0.5 25°C -40°C 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-219.Power-down mode supply current vs. VCC. Watchdog and sampled BOD enabled. 5 85°C 4.5 ICC [µA] 4 3.5 3 2.5 2 25°C -40°C 1.5 1 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-220.Power-down mode supply current vs. Temperature. Watchdog and sampled BOD enabled and running from internal ULP oscillator. 4.5 3.0V 2.7V 2.2V 1.8V 4 3.5 ICC [µA] 3 2.5 2 1.5 1 0.5 0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.4.2 I/O Pin Characteristics 34.4.2.1 Pull-up Figure 34-221.I/O pin pull-up resistor current vs. input voltage. VCC = 1.8V. 70 60 IPIN [µA] 50 40 30 20 -40°C 25°C 85°C 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.
Figure 34-222.I/O pin pull-up resistor current vs. input voltage. VCC = 3.0V. 120 108 96 IPIN [µA] 84 72 60 48 36 24 -40°C 25°C 85°C 12 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VPIN [V] Figure 34-223.I/O pin pull-up resistor current vs. input voltage. VCC = 3.3V. 140 126 112 IPIN [µA] 98 84 70 56 42 -40°C 25°C 85°C 28 14 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.
34.4.2.2 Output Voltage vs. Sink/Source Current Figure 34-224.I/O pin output voltage vs. source current. VCC = 1.8V. 2 1.8 1.6 VPIN[V] 1.4 1.2 1 25°C -40°C 0.8 0.6 85°C 0.4 0.2 0 -5 -4.5 -4 -3.5 -3 -2.5 -2 -1.5 -1 -0.5 0 IPIN [mA] Figure 34-225.I/O pin output voltage vs. source current. VCC = 3.0V. 3.5 3 VPIN[V] 2.5 2 -40°C 1.5 85°C 25°C 1 0.
Figure 34-226.I/O pin output voltage vs. source current. VCC = 3.3V. 3.5 3 VPIN [V] 2.5 2 1.5 -40°C 1 25°C 85°C 0.5 0 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 IPIN [mA] Figure 34-227.I/O pin output voltage vs. sink current. VCC = 1.8V. 1 85°C 0.9 25°C 0.8 VPIN [V] 0.7 -40°C 0.6 0.5 0.4 0.3 0.2 0.
Figure 34-228.I/O pin output voltage vs. sink current. VCC = 3.0V. 1 85°C 0.9 25°C 0.8 -40°C VPIN [V] 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 2 4 6 8 10 12 14 16 IPIN [mA] Figure 34-229.I/O pin output voltage vs. sink current. VCC = 3.3V. 1 85°C 25°C 0.9 -40°C 0.8 VPIN [V] 0.7 0.6 0.5 0.4 0.3 0.2 0.
34.4.2.3 Thresholds and Hysteresis Figure 34-230.I/O pin input threshold voltage vs. VCC. VIH I/O pin read as “1”. -40°C 25°C 85°C 1.8 1.7 Vthreshold [V] 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-231.I/O pin input threshold voltage vs. VCC. VIL I/O pin read as “0”. 1.6 -40°C 85°C 25°C 1.5 Vthreshold [V] 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-232.I/O pin input hysteresis vs. VCC. 0.42 0.39 Vthreshold [V] 0.36 0.33 0.3 0.27 0.24 -40°C 0.21 25°C 0.18 85°C 0.15 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 2.4 2.6 2.8 3.0 VCC [V] 34.4.3 ADC Characteristics Figure 34-233.INL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 1.6 1.4 INL[LSB] 1.2 Single-ended unsigned mode 1.0 0.8 0.6 Differential mode 0.4 Single-ended signed mode 0.2 0.0 1.0 1.2 1.4 1.6 1.8 2.0 2.
Figure 34-234.INL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.70 0.65 Single-ended unsigned mode INL[LSB] 0.60 0.55 Differential mode 0.50 0.45 0.40 0.35 Single-ended signed mode 0.30 0.25 50 100 150 200 250 300 ADC sample rate [ksps] Figure 34-235.INL error vs. input code. 1.25 1.00 0.75 INL[LSB] 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -1.
Figure 34-236.DNL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 0.70 0.65 0.60 Single-ended unsigned mode DNL [LSB] 0.55 0.50 0.45 0.40 Differential mode 0.35 Single-ended signed mode 0.30 0.25 0.20 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VREF [V] Figure 34-237.DNL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.60 0.55 Single-ended unsigned mode DNL [LSB] 0.50 0.45 0.40 Differential mode 0.35 0.30 Single-ended signed mode 0.25 0.
Figure 34-238.DNL error vs. input code. 1 DNL [LSB] 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 0 512 1024 1536 2048 2560 3072 3584 4096 ADC input code Figure 34-239.Gain error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. -5 Gain error [mV] -6 -7 Differential mode -8 -9 Single-ended signed mode -10 -11 -12 Single-ended unsigned mode -13 -14 -15 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-240.Gain error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. -2 Gain error [mV] -3 -4 Differential mode -5 Single-ended signed mode -6 Single-ended unsigned mode -7 -8 -9 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VCC [V] Figure 34-241.Offset error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. 9.4 9.2 Offset error [mV] 9.0 8.8 Differential mode 8.6 8.4 8.2 8.0 7.8 7.6 7.4 7.2 7.0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-242.Gain error vs. temperature. VCC = 3.0V, VREF = external 2.0V. -3 Gain error [mV] -4 -5 Single-ended signed mode -6 -7 Differential mode -8 -9 -10 Single-ended unsigned mode -11 -12 -13 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-243.Offset error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. 8.00 Offset error [mV] 7.00 6.00 5.00 Differential mode 4.00 3.00 2.00 1.00 0.00 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.
34.4.4 Analog Comparator Characteristics Figure 34-244.Analog comparator hysteresis vs. VCC. Small hysteresis. 19 18 85°C VHYST [mV] 17 16 25°C 15 14 -40°C 13 12 11 10 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-245.Analog comparator hysteresis vs. VCC. Large hysteresis. 36 85°C 34 VHYST [mV] 32 25°C 30 28 -40°C 26 24 22 20 18 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-246.Analog comparator current source vs. calibration value. VCC = 3.0V. 8 7 I [µA] 6 5 3.6V 4 3.0V 2.4V 3 2.0V 1.6V 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CALIB[3..0] Figure 34-247.Voltage scaler INL vs. SCALEFAC. T = 25C, VCC = 3.0V. 0.39 0.36 INL [LSB] 0.33 0.3 25°C 0.27 0.24 0.21 0.18 0.
34.4.5 Internal 1.0V reference Characteristics Figure 34-248.ADC Internal 1.0V reference vs. temperature. 1.012 Bandgap Voltage [V] 1.01 1.008 1.006 1.004 1.002 1.8V 2.7V 3.0V 1 0.998 0.996 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 35 45 55 65 75 85 Temperature [°C] 34.4.6 BOD Characteristics Figure 34-249.BOD thresholds vs. temperature. BOD level = 1.6V. 1.626 1.624 VBOT [V] 1.622 1.62 1.618 1.616 1.614 1.
Figure 34-250.BOD thresholds vs. temperature. BOD level = 3.0V. 3.09 3.08 VBOT [V] 3.07 3.06 3.05 3.04 3.03 3.02 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.4.7 External Reset Characteristics Figure 34-251.Minimum Reset pin pulse width vs. VCC. 140 135 130 125 tRST [ns] 120 115 110 105 100 85°C 95 25°C -40°C 90 85 80 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-252.Reset pin pull-up resistor current vs. reset pin voltage. VCC = 1.8V. 80 70 IRESET [µA] 60 50 40 30 20 -40°C 25°C 85°C 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VRESET [V] Figure 34-253.Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.0V. 130 117 104 IRESET[µA] 91 78 65 52 39 26 -40°C 25°C 85°C 13 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.
Figure 34-254.Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.3V. 140 126 112 IRESET [µA] 98 84 70 56 42 28 -40°C 25°C 85°C 14 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.3 VRESET [V] Figure 34-255.Reset pin input threshold voltage vs. VCC. VIH - Reset pin read as “1”. 1.8 85°C 25°C -40°C VTHRESHOLD [V] 1.6 1.4 1.2 1 0.8 0.6 0.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.4.8 Oscillator Characteristics 34.4.8.1 Ultra Low-Power internal oscillator Figure 34-256.Ultra Low-Power internal oscillator frequency vs. temperature. 34.0 Frequency [kHz] 33.5 33.0 32.5 32.0 3.6V 3.0V 2.7V 1.8V 31.5 31.0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 32.768kHz Internal Oscillator Figure 34-257.32.768kHz internal oscillator frequency vs. temperature. 32.85 1.8V 2.2V 2.7V 3.0V 3.6V 3.3V 32.8 32.75 Frequency [kHz] 34.4.8.2 32.7 32.65 32.6 32.55 32.
Figure 34-258.32.768kHz internal oscillator frequency vs. calibration value. VCC = 3.0V, T = 25°C. 50 3.0V 47 Frequency [kHz] 44 41 38 35 32 29 26 23 20 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256 RC32KCAL[7..0] 34.4.8.3 2MHz Internal Oscillator Figure 34-259.2MHz internal oscillator frequency vs. temperature. DFLL disabled. 2.18 2.16 Frequency [MHz] 2.14 2.12 2.1 2.08 2.06 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 2.04 2.02 2 1.
Figure 34-260.2MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator . 2.005 1.8V 2.2V 2.7V 3.0V 3.6V 3.3V Frequency [MHz] 2 1.995 1.99 1.985 1.98 1.975 1.97 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-261.2MHz internal oscillator frequency vs. CALA calibration value. VCC = 3V. 2.5 -40°C Frequency [MHz] 2.4 25°C 2.3 85°C 2.2 2.1 2 1.9 1.8 1.
34.4.8.4 32MHz Internal Oscillator Figure 34-262.32MHz internal oscillator frequency vs. temperature. DFLL disabled. 35.5 35 Frequency [MHz] 34.5 34 33.5 33 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 32.5 32 31.5 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-263.32MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 32.1 3.3V 3.0V 2.7V 2.2V 1.8V 32.05 Frequency [MHz] 32 31.95 31.9 31.85 31.8 31.75 31.7 31.65 31.6 31.
Figure 34-264.32MHz internal oscillator CALA calibration step size. VCC = 3.0V. 0.37 0.34 Step Size [%] 0.31 0.28 0.25 0.22 0.19 -40°C 0.16 85°C 25°C 0.13 0.1 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 128 CALA Figure 34-265.32MHz internal oscillator frequency vs. CALB calibration value. VCC = 3.0V.
34.4.8.5 32MHz internal oscillator calibrated to 48MHz Figure 34-266.48MHz internal oscillator frequency vs. temperature. DFLL disabled. 54 Frequency [MHz] 53 52 51 50 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 49 48 47 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-267.48MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 48.1 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V Frequency [MHz] 48 47.9 47.8 47.7 47.6 47.5 47.4 47.
34.4.9 Two-Wire Interface characteristics Figure 34-268.SDA hold time vs. temperature. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-269.SDA hold time vs. supply voltage. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.
34.4.10 PDI characteristics Figure 34-270.Maximum PDI frequency vs. VCC. 23 -40°C 21 fMAX [MHz] 19 25°C 85°C 17 15 13 11 9 7 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.5 ATxmega256C3 34.5.1 Current consumption 34.5.1.1 Active mode supply current Figure 34-271.Active supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 650 3.3V ICC [µA] 600 550 3.0V 500 450 2.7V 400 350 300 250 2.2V 1.8V 200 150 100 50 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency [MHz] Figure 34-272.Active supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 11 10 3.3V 9 3.0V ICC [mA] 8 2.7V 7 6 5 4 2.2V 3 2 1.
Figure 34-273.Active mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 270 -40°C 240 25°C 210 ICC [µA] 85°C 180 150 120 90 60 30 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-274.Active mode supply current vs. VCC. fSYS = 1MHz external clock. 750 -40°C 25°C 85°C 700 650 ICC [µA] 600 550 500 450 400 350 300 250 200 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-275.Active mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 1500 -40°C 25°C 85°C 1400 1300 ICC [mA] 1200 1100 1000 900 800 700 600 500 400 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-276.Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 6.0 5.5 -40°C 25°C 85°C 5.0 ICC [mA] 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-277.Active mode supply current vs. VCC. fSYS = 32MHz internal oscillator. 14 -40°C 13 25°C 12 ICC [mA] 85°C 11 10 9 8 7 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 VCC [V] 34.5.1.2 Idle mode supply current Figure 34-278.Idle mode supply current vs. frequency. fSYS = 0 - 1MHz external clock, T = 25°C. 130 3.3V ICC [µA] 117 104 3.0V 91 2.7V 78 65 2.2V 52 1.8V 39 26 13 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.
Figure 34-279.Idle mode supply current vs. frequency. fSYS = 1 - 32MHz external clock, T = 25°C. 4.0 3.3V 3.5 3.0V ICC [mA] 3.0 2.7V 2.5 2.0 1.5 2.2V 1.0 1.8V 0.5 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 Frequency [MHz] Figure 34-280.Idle mode supply current vs. VCC. fSYS = 32.768kHz internal oscillator. 33 85°C 32 31 ICC [µA] -40°C 30 25°C 29 28 27 26 25 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-281.Idle mode supply current vs. VCC. fSYS = 1MHz external clock. 160 85°C 25°C -40°C 140 ICC [µA] 120 100 80 60 40 20 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-282.Idle mode supply current vs. VCC. fSYS = 2MHz internal oscillator. 390 -40°C 25°C 85°C 360 ICC [µA] 330 300 270 240 210 180 150 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-283.Idle mode supply current vs. VCC. fSYS = 32MHz internal oscillator prescaled to 8MHz. 2000 -40°C 25°C 85°C 1800 ICC [µA] 1600 1400 1200 1000 800 600 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-284.Idle mode current vs. VCC. fSYS = 32MHz internal oscillator. 5.50 -40°C 5.25 25°C 5.00 85°C ICC [mA] 4.75 4.50 4.25 4.00 3.75 3.50 3.25 3.00 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.
34.5.1.3 Power-down mode supply current Figure 34-285.Power-down mode supply current vs. VCC. All functions disabled. 4.5 85°C 4 3.5 ICC [µA] 3 2.5 2 1.5 1 0.5 25°C -40°C 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-286.Power-down mode supply current vs. VCC. Watchdog and sampled BOD enabled. 5 85°C 4.5 ICC [µA] 4 3.5 3 2.5 2 25°C -40°C 1.5 1 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-287.Power-down mode supply current vs. Temperature. Watchdog and sampled BOD enabled and running from internal ULP oscillator. 4.5 3.0V 2.7V 2.2V 1.8V 4 3.5 ICC [µA] 3 2.5 2 1.5 1 0.5 0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.5.2 I/O Pin Characteristics 34.5.2.1 Pull-up Figure 34-288.I/O pin pull-up resistor current vs. input voltage. VCC = 1.8V. 70 60 IPIN [µA] 50 40 30 20 -40°C 25°C 85°C 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.
Figure 34-289.I/O pin pull-up resistor current vs. input voltage. VCC = 3.0V. 120 108 96 IPIN [µA] 84 72 60 48 36 24 -40°C 25°C 85°C 12 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VPIN [V] Figure 34-290.I/O pin pull-up resistor current vs. input voltage. VCC = 3.3V. 140 126 112 IPIN [µA] 98 84 70 56 42 -40°C 25°C 85°C 28 14 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.
34.5.2.2 Output Voltage vs. Sink/Source Current Figure 34-291.I/O pin output voltage vs. source current. VCC = 1.8V. 2 1.8 1.6 VPIN[V] 1.4 1.2 1 25°C -40°C 0.8 0.6 85°C 0.4 0.2 0 -5 -4.5 -4 -3.5 -3 -2.5 -2 -1.5 -1 -0.5 0 IPIN [mA] Figure 34-292.I/O pin output voltage vs. source current. VCC = 3.0V. 3.5 3 VPIN[V] 2.5 2 -40°C 1.5 85°C 25°C 1 0.
Figure 34-293.I/O pin output voltage vs. source current. VCC = 3.3V. 3.5 3 VPIN [V] 2.5 2 1.5 -40°C 1 25°C 85°C 0.5 0 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 IPIN [mA] Figure 34-294.I/O pin output voltage vs. sink current. VCC = 1.8V. 1 85°C 0.9 25°C 0.8 VPIN [V] 0.7 -40°C 0.6 0.5 0.4 0.3 0.2 0.
Figure 34-295.I/O pin output voltage vs. sink current. VCC = 3.0V. 1 85°C 0.9 25°C 0.8 -40°C VPIN [V] 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 2 4 6 8 10 12 14 16 IPIN [mA] Figure 34-296.I/O pin output voltage vs. sink current. VCC = 3.3V. 1 85°C 25°C 0.9 -40°C 0.8 VPIN [V] 0.7 0.6 0.5 0.4 0.3 0.2 0.
34.5.2.3 Thresholds and Hysteresis Figure 34-297.I/O pin input threshold voltage vs. VCC. VIH I/O pin read as “1”. -40°C 25°C 85°C 1.8 1.7 Vthreshold [V] 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-298.I/O pin input threshold voltage vs. VCC. VIL I/O pin read as “0”. 1.6 -40°C 85°C 25°C 1.5 Vthreshold [V] 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-299.I/O pin input hysteresis vs. VCC. 0.42 0.39 Vthreshold [V] 0.36 0.33 0.3 0.27 0.24 -40°C 0.21 25°C 0.18 85°C 0.15 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 2.4 2.6 2.8 3.0 VCC [V] 34.5.3 ADC Characteristics Figure 34-300.INL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 1.6 1.4 INL[LSB] 1.2 Single-ended unsigned mode 1.0 0.8 0.6 Differential mode 0.4 Single-ended signed mode 0.2 0.0 1.0 1.2 1.4 1.6 1.8 2.0 2.
Figure 34-301.INL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.70 0.65 Single-ended unsigned mode INL[LSB] 0.60 0.55 Differential mode 0.50 0.45 0.40 0.35 Single-ended signed mode 0.30 0.25 50 100 150 200 250 300 ADC sample rate [ksps] Figure 34-302.INL error vs. input code. 1.25 1.00 0.75 INL[LSB] 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -1.
Figure 34-303.DNL error vs. external VREF. T = 25C, VCC = 3.6V, external reference. 0.70 0.65 0.60 Single-ended unsigned mode DNL [LSB] 0.55 0.50 0.45 0.40 Differential mode 0.35 Single-ended signed mode 0.30 0.25 0.20 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VREF [V] Figure 34-304.DNL error vs. sample rate. T = 25C, VCC = 3.6V, VREF = 3.0V external. 0.60 0.55 Single-ended unsigned mode DNL [LSB] 0.50 0.45 0.40 Differential mode 0.35 0.30 Single-ended signed mode 0.25 0.
Figure 34-305.DNL error vs. input code. 1 DNL [LSB] 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 0 512 1024 1536 2048 2560 3072 3584 4096 ADC input code Figure 34-306.Gain error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. -5 Gain error [mV] -6 -7 Differential mode -8 -9 Single-ended signed mode -10 -11 -12 Single-ended unsigned mode -13 -14 -15 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-307. Gain error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. -2 Gain error [mV] -3 -4 Differential mode -5 Single-ended signed mode -6 Single-ended unsigned mode -7 -8 -9 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VCC [V] Figure 34-308. Offset error vs. VREF. T = 25C, VCC = 3.6V, ADC sample rate = 300ksps. 9.4 9.2 Offset error [mV] 9.0 8.8 Differential mode 8.6 8.4 8.2 8.0 7.8 7.6 7.4 7.2 7.0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.
Figure 34-309. Gain error vs. temperature. VCC = 3.0V, VREF = external 2.0V. -3 Gain error [mV] -4 -5 Single-ended signed mode -6 -7 Differential mode -8 -9 -10 Single-ended unsigned mode -11 -12 -13 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-310. Offset error vs. VCC. T = 25C, VREF = external 1.0V, ADC sample rate = 300ksps. 8.00 Offset error [mV] 7.00 6.00 5.00 Differential mode 4.00 3.00 2.00 1.00 0.00 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.
34.5.4 Analog Comparator Characteristics Figure 34-311. Analog comparator hysteresis vs. VCC. Small hysteresis. 19 18 85°C VHYST [mV] 17 16 25°C 15 14 -40°C 13 12 11 10 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 34-312. Analog comparator hysteresis vs. VCC. Large hysteresis. 36 85°C 34 VHYST [mV] 32 25°C 30 28 -40°C 26 24 22 20 18 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-313. Analog comparator current source vs. calibration value. VCC = 3.0V. 8 7 I [µA] 6 5 3.6V 4 3.0V 2.4V 3 2.0V 1.6V 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CALIB[3..0] Figure 34-314. Voltage scaler INL vs. SCALEFAC. T = 25C, VCC = 3.0V. 0.39 0.36 INL [LSB] 0.33 0.3 25°C 0.27 0.24 0.21 0.18 0.
34.5.5 Internal 1.0V reference Characteristics Figure 34-315. ADC Internal 1.0V reference vs. temperature. 1.012 Bandgap Voltage [V] 1.01 1.008 1.006 1.004 1.002 1.8V 2.7V 3.0V 1 0.998 0.996 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 35 45 55 65 75 85 Temperature [°C] 34.5.6 BOD Characteristics Figure 34-316. BOD thresholds vs. temperature. BOD level = 1.6V. 1.626 1.624 VBOT [V] 1.622 1.62 1.618 1.616 1.614 1.
Figure 34-317. BOD thresholds vs. temperature. BOD level = 3.0V. 3.09 3.08 VBOT [V] 3.07 3.06 3.05 3.04 3.03 3.02 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 34.5.7 External Reset Characteristics Figure 34-318. Minimum Reset pin pulse width vs. VCC. 140 135 130 125 tRST [ns] 120 115 110 105 100 85°C 95 25°C -40°C 90 85 80 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
Figure 34-319. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 1.8V. 80 70 IRESET [µA] 60 50 40 30 20 -40°C 25°C 85°C 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VRESET [V] Figure 34-320. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.0V. 130 117 104 IRESET[µA] 91 78 65 52 39 26 -40°C 25°C 85°C 13 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.
Figure 34-321. Reset pin pull-up resistor current vs. reset pin voltage. VCC = 3.3V. 140 126 112 IRESET [µA] 98 84 70 56 42 28 -40°C 25°C 85°C 14 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.3 VRESET [V] Figure 34-322. Reset pin input threshold voltage vs. VCC. VIH - Reset pin read as “1”. 1.8 85°C 25°C -40°C VTHRESHOLD [V] 1.6 1.4 1.2 1 0.8 0.6 0.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
34.5.8 Oscillator Characteristics 34.5.8.1 Ultra Low-Power internal oscillator Figure 34-323. Ultra Low-Power internal oscillator frequency vs. temperature. 34.0 Frequency [kHz] 33.5 33.0 32.5 32.0 3.6V 3.0V 2.7V 1.8V 31.5 31.0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] 32.768kHz Internal Oscillator Figure 34-324. 32.768kHz internal oscillator frequency vs. temperature. 32.85 1.8V 2.2V 2.7V 3.0V 3.6V 3.3V 32.8 32.75 Frequency [kHz] 34.5.8.2 32.7 32.65 32.6 32.55 32.
Figure 34-325. 32.768kHz internal oscillator frequency vs. calibration value. VCC = 3.0V, T = 25°C. 50 3.0V 47 Frequency [kHz] 44 41 38 35 32 29 26 23 20 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256 RC32KCAL[7..0] 34.5.8.3 2MHz Internal Oscillator Figure 34-326. 2MHz internal oscillator frequency vs. temperature. DFLL disabled. 2.18 2.16 Frequency [MHz] 2.14 2.12 2.1 2.08 2.06 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 2.04 2.02 2 1.
Figure 34-327. 2MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 2.005 1.8V 2.2V 2.7V 3.0V 3.6V 3.3V Frequency [MHz] 2 1.995 1.99 1.985 1.98 1.975 1.97 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-328. 2MHz internal oscillator frequency vs. CALA calibration value. VCC = 3V. 2.5 -40°C Frequency [MHz] 2.4 25°C 2.3 85°C 2.2 2.1 2 1.9 1.8 1.
34.5.8.4 32MHz Internal Oscillator Figure 34-329. 32MHz internal oscillator frequency vs. temperature. DFLL disabled. 35.5 35 Frequency [MHz] 34.5 34 33.5 33 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 32.5 32 31.5 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-330. 32MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 32.1 3.3V 3.0V 2.7V 2.2V 1.8V 32.05 Frequency [MHz] 32 31.95 31.9 31.85 31.8 31.75 31.7 31.65 31.6 31.
Figure 34-331. 32MHz internal oscillator CALA calibration step size. VCC = 3.0V. 0.37 0.34 Step Size [%] 0.31 0.28 0.25 0.22 0.19 -40°C 0.16 85°C 25°C 0.13 0.1 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 128 CALA Figure 34-332. 32MHz internal oscillator frequency vs. CALB calibration value. VCC = 3.0V.
34.5.8.5 32MHz internal oscillator calibrated to 48MHz Figure 34-333. 48MHz internal oscillator frequency vs. temperature. DFLL disabled. 54 Frequency [MHz] 53 52 51 50 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V 49 48 47 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-334. 48MHz internal oscillator frequency vs. temperature. DFLL enabled, from the 32.768kHz internal oscillator. 48.1 3.6V 3.3V 3.0V 2.7V 2.2V 1.8V Frequency [MHz] 48 47.9 47.8 47.7 47.6 47.5 47.4 47.
34.5.9 Two-Wire Interface characteristics Figure 34-335. SDA hold time vs. temperature. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 Temperature [°C] Figure 34-336. SDA hold time vs. supply voltage. 500 450 3 Hold time [ns] 400 350 2 300 250 200 150 100 1 50 0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.
34.5.10 PDI characteristics Figure 34-337. Maximum PDI frequency vs. VCC. 23 -40°C 21 fMAX [MHz] 19 25°C 85°C 17 15 13 11 9 7 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
35. Errata 35.1 ATxmega256C3 35.1.1 Rev I AC system status flags are only valid if AC-system is enabled Temperature sensor not calibrated 1. AC system status flags are only valid if AC-system is enabled The status flags for the ac-output are updated even though the AC is not enabled which is invalid. Also, it is not possible to clear the AC interrupt flags without enabling either of the Analog comparators.
35.2 ATxmega192C3 35.2.1 Rev I AC system status flags are only valid if AC-system is enabled Temperature sensor not calibrated 1. AC system status flags are only valid if AC-system is enabled The status flags for the ac-output are updated even though the AC is not enabled which is invalid. Also, it is not possible to clear the AC interrupt flags without enabling either of the Analog comparators.
35.3 ATxmega128C3 35.3.1 Rev J AC system status flags are only valid if AC-system is enabled Temperature sensor not calibrated 1. AC system status flags are only valid if AC-system is enabled The status flags for the ac-output are updated even though the AC is not enabled which is invalid. Also, it is not possible to clear the AC interrupt flags without enabling either of the Analog comparators.
35.4 ATxmega64C3 35.4.1 Rev I AC system status flags are only valid if AC-system is enabled Temperature sensor not calibrated 1. AC system status flags are only valid if AC-system is enabled The status flags for the ac-output are updated even though the AC is not enabled which is invalid. Also, it is not possible to clear the AC interrupt flags without enabling either of the Analog comparators.
35.5 ATxmega32C3 35.5.1 Rev I AC system status flags are only valid if AC-system is enabled Temperature sensor not calibrated 1. AC system status flags are only valid if AC-system is enabled The status flags for the ac-output are updated even though the AC is not enabled which is invalid. Also, it is not possible to clear the AC interrupt flags without enabling either of the Analog comparators.
36. Datasheet revision history Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 36.1 8492F – 07/2013 1. 36.2 36.3 Errata Temperature sensor not calibrated added to: ATxmega256C3 “Rev I” on page 328 ATxmega192C3 “Rev I” on page 329 ATxmega128C3 “Rev J” on page 330 ATxmega64C3 “Rev I” on page 331 ATxmega32C3 “Rev I” on page 332 8492E – 05/2013 1.
36.4 36.5 36.6 11. Added “Typical Characteristics” for “ATxmega32C3” on page 158. 13. Added “Typical Characteristics” for “ATxmega128C3” on page 226. 14. Updated “Errata” on page 328. Added Errata on all rev I: AC system status flags are only valid if AC-system is enabled. 8492C – 07/2012 1. Added “Electrical Characteristics” for “ATxmega64C3” on page 82. 2. Removed DMA from all “Electrical Characteristics” . 3.
Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2. Pinout/Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3.1 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11. System Control and Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 11.1 11.2 11.3 11.4 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reset Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reset Sources . . . . . . . . . . . . . . . . . . . . .
23. USART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 23.1 23.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 24. IRCOM – IR Communication Module . . . . . . . . . . . . . . . . . . . . . . . . 42 24.1 24.2 Features . . . . . . . . . . . . . . . . . . . . . . . . .
35.4 35.5 ATxmega64C3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331 ATxmega32C3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332 36. Datasheet revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333 36.1 36.2 36.3 36.4 36.5 36.6 8492F – 07/2013. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8492E – 05/2013. . . . . . . . . . . . . . .
Atmel Corporation 1600 Technology Drive Atmel Asia Limited Unit 01-5 & 16, 19F Atmel Munich GmbH Business Campus Atmel Japan G.K. 16F Shin-Osaki Kangyo Bldg San Jose, CA 95110 BEA Tower, Millennium City 5 Parkring 4 1-6-4 Osaki, Shinagawa-ku USA 418 Kwun Tong Roa D-85748 Garching b. Munich Tokyo 141-0032 Tel: (+1) (408) 441-0311 Kwun Tong, Kowloon GERMANY JAPAN Fax: (+1) (408) 487-2600 HONG KONG Tel: (+49) 89-31970-0 Tel: (+81) (3) 6417-0300 www.atmel.
