Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller VQFN 44 (7x7) 8/16-Bit 32 MHz I/O number 34

Features

• High-performance, Low-power 8/16-bit Atmel

AVR

XMEGA

™

Microcontroller

• Non-volatile Program and Data Memories

– 16 KB - 128 KB of In-System Self-Programmable Flash

– 4 KB - 8 KB Boot Code Section with Independent Lock Bits

– 1 KB - 2 KB EEPROM

– 2 KB - 8 KB Internal SRAM

• Peripheral Features

– Four-channel DMA Controller with support for external requests

– Eight-channel Event System

– Five 16-bit Timer/Counters

Three Timer/Counters with 4 Output Compare or Input Capture channels

Two Timer/Counters with 2 Output Compare or Input Capture channels

High-Resolution Extensions on all Timer/Counters

Advanced Waveform Extension on one Timer/Counter

– Five USARTs

IrDA Extension on one USART

– Two Two-Wire Interfaces with dual address match (I

C and SMBus compatible)

– Two SPIs (Serial Peripheral Interfaces) peripherals

– AES and DES Crypto Engine

– 16-bit Real Time Counter with Separate Oscillator

– One Twelve-channel, 12-bit, 2 Msps Analog to Digital Converter

– One Two-channel, 12-bit, 1 Msps Digital to Analog Converter

– Two Analog Comparators with Window compare function

– External Interrupts on all General Purpose I/O pins

– Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator

• Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal and External Clock Options with PLL

– Programmable Multi-level Interrupt Controller

– Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby

– Advanced Programming, Test and Debugging Interfaces

PDI (Program and Debug Interface) for programming, test and debugging

• I/O and Packages

– 34 Programmable I/O Lines

– 44 - lead TQFP

– 44 - pad VQFN/QFN

– 49 - ball VFBGA

• Operating Voltage

– 1.6 – 3.6V

• Speed performance

– 0 – 12 MHz @ 1.6 – 3.6V

– 0 – 32 MHz @ 2.7 – 3.6V

Typical Applications

• Industrial control • Climate control • Hand-held battery applications

• Factory automation • ZigBee • Power tools

• Building control • Motor control • HVAC

• Board control • Networking • Metering

• White Goods • Optical • Medical Applications

8/16-bit

XMEGA A4

Microcontroller

ATxmega128A4

ATxmega64A4

ATxmega32A4

ATxmega16A4

Not recommended for

new designs - Use

XMEGA A4U series

8069R–AVR–06/2013

Not recommended for new designs -

Use XMEGA A4U series

Summary of content (108 pages)

PAGE 1
Features • High-performance, Low-power 8/16-bit Atmel® AVR® XMEGA™ Microcontroller • Non-volatile Program and Data Memories • • • • • – 16 KB - 128 KB of In-System Self-Programmable Flash – 4 KB - 8 KB Boot Code Section with Independent Lock Bits – 1 KB - 2 KB EEPROM – 2 KB - 8 KB Internal SRAM Peripheral Features – Four-channel DMA Controller with support for external requests – Eight-channel Event System – Five 16-bit Timer/Counters Three Timer/Counters with 4 Output Compare or Input Capture channels
PAGE 2
XMEGA A4 1. Ordering Information Flash E2 SRAM Speed (MHz) Power Supply ATxmega128A4-AU 128 KB + 8 KB 2 KB 8 KB 32 1.6 - 3.6V ATxmega64A4-AU 64 KB + 4 KB 2 KB 4 KB 32 1.6 - 3.6V ATxmega32A4-AU 32 KB + 4 KB 1 KB 4 KB 32 1.6 - 3.6V ATxmega16A4-AU 16 KB + 4 KB 1 KB 2 KB 32 1.6 - 3.6V ATxmega128A4-MH 128 KB + 8 KB 2 KB 8 KB 32 1.6 - 3.6V ATxmega64A4-MH 64 KB + 4 KB 2 KB 4 KB 32 1.6 - 3.6V ATxmega32A4-MH 32 KB + 4 KB 1 KB 4 KB 32 1.6 - 3.
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XMEGA A4 2.
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XMEGA A4 Figure 2-2. VFBGA pinout Top view 1 2 3 4 5 Bottom view 6 7 7 6 5 4 3 2 1 A A B B C C D D E E F F G G Table 2-1.
PAGE 5
XMEGA A4 3. Overview The Atmel® AVR® XMEGA™A4 is a family of low power, high performance and peripheral rich CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the XMEGA A4 achieves throughputs approaching 1 Million Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR CPU combines a rich instruction set with 32 general purpose working registers.
PAGE 6
XMEGA A4 3.1 Block Diagram Figure 3-1. XMEGA A4 Block Diagram PR[0..1] XTAL1/ TOSC1 XTAL2/ TOSC2 Oscillator Circuits/ Clock Generation PORT R (2) Watchdog Oscillator Real Time Counter Watchdog Timer DATA BUS PA[0..7] PORT A (8) Event System Controller Oscillator Control VCC Power Supervision POR/BOD & RESET GND SRAM ACA DMA Controller Sleep Controller RESET/ PDI_CLK PDI ADCA PDI_DATA AREFA BUS Controller Prog/Debug Controller VCC/10 Int. Ref.
PAGE 7
XMEGA A4 4. Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 4.1 Recommended reading • Atmel AVR XMEGA A Manual • XMEGA A Application Notes This device data sheet only contains part specific information and a short description of each peripheral and module. The XMEGA A Manual describes the modules and peripherals in depth.
PAGE 8
XMEGA A4 6. AVR CPU 6.1 Features • 8/16-bit high performance AVR RISC Architecture • • • • • • • 6.
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XMEGA A4 concept enables instructions to be executed in every clock cycle. The program memory is InSystem Re-programmable Flash memory. 6.3 Register File The fast-access Register File contains 32 x 8-bit general purpose working registers with single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typical ALU cycle, the operation is performed on two Register File operands, and the result is stored back in the Register File.
PAGE 10
XMEGA A4 7. Memories 7.
PAGE 11
XMEGA A4 7.3 In-System Programmable Flash Program Memory The XMEGA A4 devices contain On-chip In-System Programmable Flash memory for program storage, see Figure 7-1 on page 11. Since all AVR instructions are 16- or 32-bits wide, each Flash address location is 16 bits. The Program Flash memory space is divided into Application and Boot sections. Both sections have dedicated Lock Bits for setting restrictions on write or read/write operations.
PAGE 12
XMEGA A4 7.4 Data Memory The Data Memory consist of the I/O Memory, EEPROM and SRAM memories, all within one linear address space, see Figure 7-2 on page 12. To simplify development, the memory map for all devices in the family is identical and with empty, reserved memory space for smaller devices. Figure 7-2.
PAGE 13
XMEGA A4 7.4.3 EEPROM Data Memory The XMEGA A4 devices have internal EEPROM memory for non-volatile data storage. It is addressable either in a separate data space or it can be memory mapped into the normal data memory space. The EEPROM memory supports both byte and page access. 7.5 Production Signature Row The Production Signature Row is a separate memory section for factory programmed data. It contains calibration data for functions such as oscillators and analog modules.
PAGE 14
XMEGA A4 7.7 Flash and EEPROM Page Size The Flash Program Memory and EEPROM data memory are organized in pages. The pages are word accessible for the Flash and byte accessible for the EEPROM. Table 7-2 on page 14 shows the Flash Program Memory organization. Flash write and erase operations are performed on one page at a time, while reading the Flash is done one byte at a time. For Flash access the Z-pointer (Z[m:n]) is used for addressing.
PAGE 15
XMEGA A4 8. DMAC - Direct Memory Access Controller 8.1 Features • Allows High-speed data transfer • • • • • 8.
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XMEGA A4 9. Event System 9.1 Features • • • • • • • • 9.
PAGE 17
XMEGA A4 Figure 9-1. Event System Block Diagram PORTx ClkSYS CPU ADCx RTC Event Routing Network DACx IRCOM ACx T/Cxn DMAC The Event Routing Network can directly connect together ADCs, DACs, Analog Comparators (ACx), I/O ports (PORTx), the Real-time Counter (RTC), Timer/Counters (T/C) and the IR Communication Module (IRCOM). Events can also be generated from software (CPU). All events from all peripherals are always routed into the Event Routing Network.
PAGE 18
XMEGA A4 10. System Clock and Clock options 10.1 Features • Fast start-up time • Safe run-time clock switching • Internal Oscillators: • • • • • • 10.2 – 32 MHz run-time calibrated RC oscillator – 2 MHz run-time calibrated RC oscillator – 32.768 kHz calibrated RC oscillator – 32 kHz Ultra Low Power (ULP) oscillator with 1 kHz ouput External clock options – 0.
PAGE 19
XMEGA A4 Figure 10-1. Clock system overview clkULP WDT/BOD 32 kHz ULP Internal Oscillator clkRTC RTC 32.768 kHz Calibrated Internal Oscillator PERIPHERALS ADC 2 MHz Run-Time Calibrated Internal Oscillator 32 MHz Run-time Calibrated Internal Oscillator DAC CLOCK CONTROL clkPER UNIT with PLL and Prescaler PORTS ... DMA INTERRUPT 32.768 KHz Crystal Oscillator EVSYS RAM 0.
PAGE 20
XMEGA A4 10.3.3 32.768 kHz Crystal Oscillator The 32.768 kHz Crystal Oscillator is a low power driver for an external watch crystal. It can be used as system clock source or as asynchronous clock source for the Real Time Counter. 10.3.4 0.4 - 16 MHz Crystal Oscillator The 0.4 - 16 MHz Crystal Oscillator is a driver intended for driving both external resonators and crystals ranging from 400 kHz to 16 MHz. 10.3.
PAGE 21
XMEGA A4 11. Power Management and Sleep Modes 11.1 Features • 5 sleep modes – Idle – Power-down – Power-save – Standby – Extended standby • Power Reduction registers to disable clocks to unused peripherals 11.2 Overview The XMEGA A4 provides various sleep modes tailored to reduce power consumption to a minimum. All sleep modes are available and can be entered from Active mode. In Active mode the CPU is executing application code. The application code decides when and what sleep mode to enter.
PAGE 22
XMEGA A4 11.3.5 Extended Standby Mode Extended Standby mode is identical to Power-save mode with the exception that all enabled system clock sources are kept running while the CPU and Peripheral clocks are stopped. This reduces the wake-up time when external crystals or resonators are used.
PAGE 23
XMEGA A4 12. System Control and Reset 12.1 Features • Multiple reset sources for safe operation and device reset – Power-On Reset – External Reset – Watchdog Reset The Watchdog Timer runs from separate, dedicated oscillator – Brown-Out Reset Accurate, programmable Brown-Out levels – PDI reset – Software reset • Asynchronous reset – No running clock in the device is required for reset • Reset status register 12.2 Resetting the AVR During reset, all I/O registers are set to their initial values.
PAGE 24
XMEGA A4 12.3.5 PDI reset The MCU can be reset through the Program and Debug Interface (PDI). 12.3.6 Software reset The MCU can be reset by the CPU writing to a special I/O register through a timed sequence. 13. WDT - Watchdog Timer 13.1 Features • 11 selectable timeout periods, from 8 ms to 8s. • Two operation modes – Standard mode – Window mode • Runs from the 1 kHz output of the 32 kHz Ultra Low Power oscillator • Configuration lock to prevent unwanted changes 13.
PAGE 25
XMEGA A4 14. PMIC - Programmable Multi-level Interrupt Controller 14.1 Features • Separate interrupt vector for each interrupt • Short, predictable interrupt response time • Programmable Multi-level Interrupt Controller – 3 programmable interrupt levels – Selectable priority scheme within low level interrupts (round-robin or fixed) – Non-Maskable Interrupts (NMI) • Interrupt vectors can be moved to the start of the Boot Section 14.
PAGE 26
XMEGA A4 Table 14-1.
PAGE 27
XMEGA A4 15. I/O Ports 15.1 Features • Selectable input and output configuration for each pin individually • Flexible pin configuration through dedicated Pin Configuration Register • Synchronous and/or asynchronous input sensing with port interrupts and events • • • • • • • • • • 15.
PAGE 28
XMEGA A4 15.3.1 Push-pull Figure 15-1. I/O configuration - Totem-pole DIRn OUTn Pn INn 15.3.2 Pull-down Figure 15-2. I/O configuration - Totem-pole with pull-down (on input) DIRn OUTn Pn INn 15.3.3 Pull-up Figure 15-3. I/O configuration - Totem-pole with pull-up (on input) DIRn OUTn Pn INn 15.3.4 Bus-keeper The bus-keeper’s weak output produces the same logical level as the last output level. It acts as a pull-up if the last level was ‘1’, and pull-down if the last level was ‘0’.
PAGE 29
XMEGA A4 Figure 15-4. I/O configuration - Totem-pole with bus-keeper DIRn OUTn Pn INn 15.3.5 Others Figure 15-5. Output configuration - Wired-OR with optional pull-down OUTn Pn INn Figure 15-6.
PAGE 30
XMEGA A4 15.4 Input sensing • • • • Sense both edges Sense rising edges Sense falling edges Sense low level Input sensing is synchronous or asynchronous depending on the enabled clock for the ports, and the configuration is shown in Figure 15-7 on page 30. Figure 15-7.
PAGE 31
XMEGA A4 16. T/C - 16-bit Timer/Counter 16.1 Features • Five 16-bit Timer/Counters • • • • • • • • • • • • 16.
PAGE 32
XMEGA A4 Figure 16-1.
PAGE 33
XMEGA A4 17. AWEX - Advanced Waveform Extension 17.1 Features • • • • • • • • 17.
PAGE 34
XMEGA A4 18. Hi-Res - High Resolution Extension 18.1 Features • Increases Waveform Generator resolution by 2-bits (4x) • Supports Frequency, single- and dual-slope PWM operation • Supports the AWEX when this is enabled and used for the same Timer/Counter 18.2 Overview The Hi-Resolution (Hi-Res) Extension is able to increase the resolution of the waveform generation output by a factor of 4.
PAGE 35
XMEGA A4 19. RTC - 16-bit Real-Time Counter 19.1 Features • • • • • • 19.2 16-bit Timer Flexible Tick resolution ranging from 1 Hz to 32.768 kHz One Compare register One Period register Clear timer on Overflow or Compare Match Overflow or Compare Match event and interrupt generation Overview The XMEGA A4 includes a 16-bit Real-time Counter (RTC). The RTC can be clocked from an accurate 32.768 kHz Crystal Oscillator, the 32.
PAGE 36
XMEGA A4 20. TWI - Two-Wire Interface 20.1 Features • • • • • • • • • • • • 20.
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XMEGA A4 21. SPI - Serial Peripheral Interface 21.1 Features • • • • • • • • • 21.
PAGE 38
XMEGA A4 22. USART 22.1 Features • • • • • • • • • • • • • • • 22.
PAGE 39
XMEGA A4 23. IRCOM - IR Communication Module 23.1 Features • Pulse modulation/demodulation for infrared communication • Compatible to IrDA 1.4 physical for baud rates up to 115.2 kbps • Selectable pulse modulation scheme – 3/16 of baud rate period – Fixed pulse period, 8-bit programmable – Pulse modulation disabled • Built in filtering • Can be connected to and used by one USART at a time 23.
PAGE 40
XMEGA A4 24. Crypto Engine 24.1 Features • Data Encryption Standard (DES) CPU instruction • Advanced Encryption Standard (AES) Crypto module • DES Instruction – Encryption and Decryption – Single-cycle DES instruction – Encryption/Decryption in 16 clock cycles per 8-byte block • AES Crypto Module – Encryption and Decryption – Support 128-bit keys – Support XOR data load mode to the State memory for Cipher Block Chaining – Encryption/Decryption in 375 clock cycles per 16-byte block 24.
PAGE 41
XMEGA A4 25. ADC - 12-bit Analog to Digital Converter 25.1 Features • • • • • • • • • • • • • 25.2 One ADC with 12-bit resolution 2 Msps sample rate Signed and Unsigned conversions 4 result registers with individual input channel control 12 single ended inputs 8x4 differential inputs 4 internal inputs: – Integrated Temperature Sensor – DAC Output – VCC voltage divided by 10 – Bandgap voltage Software selectable gain of 2, 4, 8, 16, 32 or 64 Selectable accuracy of 8- or 12-bit.
PAGE 42
XMEGA A4 Figure 25-1. ADC overview Channel A MUX selection Channel C MUX selection Channel D MUX selection Configuration Reference selection Pin inputs Channel A Register Channel B Register Pin inputs Internal inputs Channel B MUX selection ADC Channel C Register 1-64 X Event Trigger Channel D Register Each ADC has four MUX selection registers with a corresponding result register. This means that four channels can be sampled within 1.
PAGE 43
XMEGA A4 26. DAC - 12-bit Digital to Analog Converter 26.1 Features • • • • • • • • 26.2 One DAC with 12-bit resolution Up to 1 Msps conversion rate Flexible conversion range Multiple trigger sources 1 continuous output or 2 Sample and Hold (S/H) outputs Built-in offset and gain calibration High drive capabilities Low Power Mode Overview The XMEGA A4 devices feature one 12-bit, 1 Msps DAC with built-in offset and gain calibration, see Figure 26-1 on page 43.
PAGE 44
XMEGA A4 27. AC - Analog Comparator 27.1 Features • Two Analog Comparators • Selectable Power vs. Speed • Selectable hysteresis – 0, 20 mV, 50 mV • Analog Comparator output available on pin • Flexible Input Selection – All pins on the port – Output from the DAC – Bandgap reference voltage. – Voltage scaler that can perform a 64-level scaling of the internal VCC voltage.
PAGE 45
XMEGA A4 Figure 27-1.
PAGE 46
XMEGA A4 27.3 Input Selection The Analog comparators have a very flexible input selection and the two comparators grouped in a pair may be used to realize a window function. One pair of analog comparators is shown in Figure 27-1 on page 45.
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XMEGA A4 28. OCD - On-chip Debug 28.
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XMEGA A4 29. Program and Debug Interfaces 29.1 Features • PDI - Program and Debug Interface (Atmel proprietary 2-pin interface) • Access to the OCD system • Programming of Flash, EEPROM, Fuses and Lock Bits 29.2 Overview The programming and debug facilities are accessed through PDI physical interface. The PDI physical interface uses one dedicated pin together with the Reset pin, and no general purpose pins are used. 29.
PAGE 49
XMEGA A4 30. Pinout and Pin Functions The pinout of XMEGA A4 is shown in ”Pinout/Block Diagram” on page 3. In addition to general I/O functionality, each pin may have several functions. This will depend on which peripheral is enabled and connected to the actual pin. Only one of the alternate pin functions can be used at time. 30.1 Alternate Pin Functions Description The tables below shows the notation for all pin functions available and describe their functions. 30.1.1 30.1.2 30.1.3 30.1.
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XMEGA A4 30.1.5 30.1.6 30.1.
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XMEGA A4 30.2 Alternate Pin Functions The tables below shows the main and alternate pin functions for all pins on each port. It also shows which peripheral which make use of or enable the alternate pin function. Table 30-1.
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XMEGA A4 Table 30-4. PORTD Port D - Alternate functions PIN # INTERRUPT TCD0 SYNC OC0A TCD1 USARTD0 USARTD1 SPID GND 18 VCC 19 PD0 20 PD1 21 SYNC OC0B XCK0 PD2 22 SYNC/ASYNC OC0C RXD0 PD3 23 SYNC OC0D TXD0 PD4 24 SYNC OC1A PD5 25 SYNC OC1B XCK1 MOSI PD6 26 SYNC RXD1 MISO PD7 27 SYNC TXD1 SCK Table 30-5.
PAGE 53
XMEGA A4 31. Peripheral Module Address Map The address maps show the base address for each peripheral and module in XMEGA A4. For complete register description and summary for each peripheral module, refer to the XMEGA A Manual.
PAGE 54
XMEGA A4 32.
PAGE 55
XMEGA A4 Mnemonics Operands Description CALL k call Subroutine PC  RET Subroutine Return PC RETI Interrupt Return CPSE Rd,Rr Compare, Skip if Equal CP Rd,Rr Compare CPC Rd,Rr Compare with Carry CPI Rd,K Compare with Immediate Operation Flags #Clocks k None 3 / 4(1)  STACK None 4 / 5(1) PC  STACK I 4 / 5(1) if (Rd = Rr) PC  PC + 2 or 3 None 1/2/3 Rd - Rr Z,C,N,V,S,H 1 Rd - Rr - C Z,C,N,V,S,H 1 Rd - K Z,C,N,V,S,H 1 SBRC Rr, b Skip if Bit in Register
PAGE 56
XMEGA A4 Mnemonics Operands Description Flags #Clocks LD Rd, -Y Load Indirect and Pre-Decrement Y Rd   Y-1 (Y) None 2(1)(2) LDD Rd, Y+q Load Indirect with Displacement Rd  (Y + q) None 2(1)(2) LD Rd, Z Load Indirect Rd  (Z) None 1(1)(2) LD Rd, Z+ Load Indirect and Post-Increment Rd Z   (Z), Z+1 None 1(1)(2) LD Rd, -Z Load Indirect and Pre-Decrement Z Rd   Z - 1, (Z) None 2(1)(2) LDD Rd, Z+q Load Indirect with Displacement Rd  (Z + q) None 2(1)(2)
PAGE 57
XMEGA A4 Mnemonics Operands Description Operation ROL Rd Rotate Left Through Carry ROR Rd ASR Flags #Clocks Rd(0) Rd(n+1) C    C, Rd(n), Rd(7) Z,C,N,V,H 1 Rotate Right Through Carry Rd(7) Rd(n) C    C, Rd(n+1), Rd(0) Z,C,N,V 1 Rd Arithmetic Shift Right Rd(n)  Rd(n+1), n=0..6 Z,C,N,V 1 SWAP Rd Swap Nibbles Rd(3..0)  Rd(7..
PAGE 58
XMEGA A4 33. Packaging information 33.1 44A PIN 1 IDENTIFIER PIN 1 e B E1 E D1 D C 0°~7° A1 A2 A L COMMON DIMENSIONS (Unit of Measure = mm) Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10mm maximum. SYMBOL MIN NOM MAX A – – 1.20 A1 0.05 – 0.
PAGE 59
XMEGA A4 33.2 44M1 D Marked Pin# 1 ID E SEATING PLANE A1 TOP VIEW A3 A K L Pin #1 Corner D2 1 2 3 Option A SIDE VIEW Pin #1 Triangle E2 Option B K Option C b e Pin #1 Chamfer (C 0.30) Pin #1 Notch (0.20 R) BOTTOM VIEW COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 0.80 0.90 1.00 A1 – 0.02 0.05 A3 0.20 REF b 0.18 0.23 0.30 D 6.90 7.00 7.10 D2 5.00 5.20 5.40 E 6.90 7.00 7.10 E2 5.00 5.20 5.40 e Note: JEDEC Standard MO-220, Fig.
PAGE 60
XMEGA A4 33.3 49C2 E A1 BALL ID 0.10 D A1 TOP VIEW A A2 SIDE VIEW E1 G e F E D D1 COMMON DIMENSIONS (Unit of Measure = mm) C B 1 A1 BALL CORNER MIN NOM MAX A – – 1.00 A1 0.20 – – A2 0.65 – – D 4.90 5.00 5.10 SYMBOL A 2 3 4 5 b 6 7 e BOTTOM VIEW 49 - Ø0.35 ±0.05 D1 E 3.90 BSC 4.90 5.00 E1 b NOTE 5.10 3.90 BSC 0.30 0.35 e 0.40 0.65 BSC 3/14/08 Package Drawing Contact: packagedrawings@atmel.com TITLE 49C2, 49-ball (7 x 7 array), 0.65mm pitch, 5.0 x 5.
PAGE 61
XMEGA A4 34. Electrical Characteristics All typical values are measured at T = 25C unless other temperature condition is given. All minimum and maximum values are valid across operating temperature and voltage unless other conditions are given. 34.1 Absolute Maximum Ratings* Operating Temperature.................................. -55C to +125C *NOTICE: Storage Temperature ..................................... -65C to +150C Voltage on any Pin with respect to Ground..-0.5V to VCC+0.
PAGE 62
XMEGA A4 Table 34-1. Symbol Current Consumption (Continued) Parameter Condition Power-save mode RTC 1 kHz from Low Power 32 kHz TOSC, T = 25°C ICC Reset Current Consumption Min. Typ. Max. VCC = 1.8V 0.5 4 VCC = 3.0V 0.7 4 RTC from Low Power 32 kHz TOSC VCC = 3.0V 1.16 without Reset pull-up resistor current VCC = 3.0V 505 Units µA Module current consumption(2) RC32M RC32M w/DFLL 470 Internal 32.768 kHz oscillator as DFLL source RC2M RC2M w/DFLL 112 Internal 32.
PAGE 63
XMEGA A4 34.3 Speed Table 34-2. Symbol ClkCPU Operating voltage and frequency Parameter Condition CPU clock frequency Min Typ Max VCC = 1.6V 0 12 VCC = 1.8V 0 12 VCC = 2.7V 0 32 VCC = 3.6V 0 32 Units MHz The maximum CPU clock frequency of the XMEGA A4 devices is depending on VCC. As shown in Figure 34-1 on page 63 the Frequency vs. VCC curve is linear between 1.8V < VCC < 2.7V. Figure 34-1. Operating Frequency vs.Vcc MHz 32 Safe Operating Area 12 1.6 1.8 2.7 3.
PAGE 64
XMEGA A4 34.4 Flash and EEPROM Memory Characteristics Table 34-3. Symbol Endurance and Data Retention Parameter Condition Min 25°C 10K 85°C 10K 25°C 100 55°C 25 25°C 80K 85°C 30K 25°C 100 55°C 25 Typ Max Write/Erase cycles Units Cycle Flash Data retention Year Write/Erase cycles Cycle EEPROM Data retention Table 34-4.
PAGE 65
XMEGA A4 34.5 ADC Characteristics Table 34-5.
PAGE 66
XMEGA A4 34.6 DAC Characteristics Table 34-7. Symbol DAC Characteristics Parameter Condition INL Integral Non-Linearity VCC = 1.6-3.6V DNL Differential Non-Linearity VCC = 1.6-3.6V Fclk Min Typ VREF = Ext. ref ±5 VREF = Ext. ref <±1 VREF= AVCC External reference voltage 1.1 Reference input impedance 1000 ksps AVCC-0.6 V M >10 Max output voltage Rload=100k AVCC*0.98 Min output voltage Rload=100k <0.030 Offset factory calibration accuracy Continues mode, VCC=3.
PAGE 67
XMEGA A4 34.9 Brownout Detection Characteristics Table 34-10. Brownout Detection Characteristics(1) Symbol Parameter Condition BOD level 0 falling Vcc Min Typ Max 1.62 1.63 1.7 BOD level 1 falling Vcc 1.9 BOD level 2 falling Vcc 2.17 BOD level 3 falling Vcc 2.43 BOD level 4 falling Vcc 2.68 BOD level 5 falling Vcc 2.96 BOD level 6 falling Vcc 3.22 BOD level 7 falling Vcc 3.49 Units V Hysteresis Note: BOD level 0-5 1 % 1.
PAGE 68
XMEGA A4 34.11 POR Characteristics Table 34-12. Power-on Reset Characteristics Symbol Parameter VPOT- POR threshold voltage falling VCC VPOT+ POR threshold voltage rising VCC Condition Min Typ VCC falls faster than 1V/ms 0.4 0.8 VCC falls at 1V/ms or slower 0.8 1.3 Max Units V 1.3 1.59 Typ Max 34.12 Reset Characteristics Table 34-13. Reset Characteristics Symbol Parameter Condition Min Minimum reset pulse width Reset threshold voltage 90 VCC = 2.7 - 3.6V 0.45*VCC VCC = 1.6 - 2.
PAGE 69
XMEGA A4 Table 34-18. External 32.768kHz Crystal Oscillator and TOSC characteristics Symbol SF Parameter Condition Min Capacitive load matched to crystal specification Safety factor Typ Max 3 Recommended crystal equivalent series resistance (ESR) Crystal load capacitance 6.5pF 60 ESR/R1 Crystal load capacitance 9.0pF 35 Input capacitance between TOSC pins Normal mode 4.7 CIN_TOSC Low power mode 5.2 Note: Units k pF 1. See Figure 34-2 on page 69 for definition Figure 34-2.
PAGE 70
XMEGA A4 35. Typical Characteristics 35.1 Active Supply Current Figure 35-1. Active Supply Current vs. Frequency fSYS = 0 - 1.0 MHz External clock, T = 25°C. 700 3.3 V 600 3.0 V ICC [uA] 500 2.7 V 400 2.2 V 300 1.8 V 200 100 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency [MHz] Figure 35-2. Active Supply Current vs. Frequency fSYS = 1 - 32 MHz External clock, T = 25°C. 14 ICC [mA] 3.3 V 12 3.0 V 10 2.7 V 8 6 2.2 V 4 1.
PAGE 71
XMEGA A4 Figure 35-3. Active Supply Current vs. Vcc fSYS = 1.0 MHz External Clock. 800 85 °C 25 °C -40 °C 700 600 ICC [uA] 500 400 300 200 100 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 35-4. Active Supply Current vs. VCC fSYS = 32.768 kHz internal RC. 160 -40 °C 85 °C 25 °C 140 120 ICC [uA] 100 80 60 40 20 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
PAGE 72
XMEGA A4 Figure 35-5. Active Supply Current vs. Vcc fSYS = 2.0 MHz internal RC. 1600 85 °C 25 °C -40 °C 1400 1200 ICC [uA] 1000 800 600 400 200 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 35-6. Active Supply Current vs. Vcc fSYS = 32 MHz internal RC prescaled to 8 MHz. 7 -40 °C 25 °C 85 °C 6 ICC [mA] 5 4 3 2 1 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 Figure 35-7. Active Supply Current vs. Vcc fSYS = 32 MHz internal RC. 16 -40 °C 25 °C 85 °C 14 12 ICC [mA] 10 8 6 4 2 0 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 VCC [V] 35.2 Idle Supply Current Figure 35-8. Idle Supply Current vs. Frequency fSYS = 0 - 1.0 MHz, T = 25°C. 180 3.3 V 160 3.0 V 140 2.7 V ICC [uA] 120 100 2.2 V 80 1.8 V 60 40 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.
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XMEGA A4 Figure 35-9. Idle Supply Current vs. Frequency fSYS = 1 - 32 MHz, T = 25°C. 6 3.3 V 5 3.0 V 2.7 V ICC [mA] 4 3 2.2 V 2 1 1.8 V 0 0 4 8 12 16 20 24 28 32 Frequency [MHz] Figure 35-10. Idle Supply Current vs. Vcc fSYS = 1.0 MHz External Clock. 200 85 °C 25 °C -40 °C ICC [uA] 160 120 80 40 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 Figure 35-11. Idle Supply Current vs. Vcc fSYS = 32.768 kHz internal RC. 40 85 °C -40 °C 25 °C 35 30 ICC [uA] 25 20 15 10 5 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 35-12. Idle Supply Current vs. Vcc fSYS = 2.0 MHz internal RC. 500 -40 °C 25 °C 85 °C ICC [uA] 400 300 200 100 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 Figure 35-13. Idle Supply Current vs. Vcc fSYS = 32 MHz internal RC prescaled to 8 MHz. 3000 -40 °C 25 °C 85 °C 2500 ICC [uA] 2000 1500 1000 500 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 35-14. Idle Supply Current vs. Vcc fSYS = 32 MHz internal RC. 7 -40 °C 25 °C 85 °C 6 ICC [mA] 5 4 3 2 1 0 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.
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XMEGA A4 35.3 Power-down Supply Current Figure 35-15. Power-down Supply Current vs. Temperature 1.8 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 1.6 1.4 ICC [uA] 1.2 1 0.8 0.6 0.4 0.2 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Temperature [°C] Figure 35-16. Power-down Supply Current vs. Temperature With WDT and sampled BOD enabled. 3 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 2.5 ICC [uA] 2 1.5 1 0.
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XMEGA A4 35.4 Power-save Supply Current Figure 35-17. Power-save Supply Current vs. Temperature With WDT, sampled BOD and RTC from ULP enabled. 3 3.3 V 3.0 V 2.7 V 2.2 V 1.8 V 2.5 ICC [uA] 2 1.5 1 0.5 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Temperature [°C] 35.5 Pin Pull-up Figure 35-18. Reset Pull-up Resistor Current vs. Reset Pin Voltage VCC = 1.8V. 100 IRESET [uA] 80 60 40 20 -40 °C 25 °C 85 °C 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.
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XMEGA A4 Figure 35-19. Reset Pull-up Resistor Current vs. Reset Pin Voltage VCC = 3.0V. 160 140 IRESET [uA] 120 100 80 60 40 -40 °C 25 °C 85 °C 20 0 0 0.5 1 1.5 2 2.5 3 VRESET [V] Figure 35-20. Reset Pull-up Resistor Current vs. Reset Pin Voltage VCC = 3.3V. 180 160 140 IRESET [uA] 120 100 80 60 40 -40 °C 25 °C 85 °C 20 0 0 0.5 1 1.5 2 2.
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XMEGA A4 35.6 Pin Output Voltage vs. Sink/Source Current Figure 35-21. I/O Pin Output Voltage vs. Source Current Vcc = 1.8V. 2 -40 °C 25 °C 85 °C 1.8 1.6 VPIN [V] 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -12 -10 -8 -6 -4 -2 0 IPIN [mA] Figure 35-22. I/O Pin Output Voltage vs. Source Current Vcc = 3.0V. 3.5 -40 °C 25 °C 85 °C 3 VPIN [V] 2.5 2 1.5 1 0.
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XMEGA A4 Figure 35-23. I/O Pin Output Voltage vs. Source Current Vcc = 3.3V. 3.5 -40 °C 25 °C 85 °C 3 VPIN [V] 2.5 2 1.5 1 0.5 0 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 IPIN [mA] Figure 35-24. I/O Pin Output Voltage vs. Sink Current Vcc = 1.8V. 85°C 25°C 1.8 1.6 1.4 VPIN [V] 1.2 -40 °C 1 0.8 0.6 0.4 0.
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XMEGA A4 Figure 35-25. I/O Pin Output Voltage vs. Sink Current Vcc = 3.0V. 0.7 85 °C 0.6 25 °C -40 °C VPIN [V] 0.5 0.4 0.3 0.2 0.1 0 0 2 4 6 8 10 12 14 16 18 20 IPIN [mA] Figure 35-26. I/O Pin Output Voltage vs. Sink Current Vcc = 3.3V. VPIN [V] 0.7 0.6 85 °C 0.5 25 °C -40 °C 0.4 0.3 0.2 0.
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XMEGA A4 35.7 Pin Thresholds and Hysteresis Figure 35-27. I/O Pin Input Threshold Voltage vs. VCC VIH - I/O Pin Read as “1”. 2.5 -40 °C 25 °C 85 °C Vthreshold [V] 2 1.5 1 0.5 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 35-28. I/O Pin Input Threshold Voltage vs. VCC VIL - I/O Pin Read as “0”. 1.8 85 °C 25 °C -40 °C 1.6 1.4 Vthreshold [V] 1.2 1 0.8 0.6 0.4 0.2 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 Figure 35-29. I/O Pin Input Hysteresis vs. VCC. 0.7 0.6 Vthreshold [V] 0.5 85 °C 25 °C -40 °C 0.4 0.3 0.2 0.1 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 35-30. Reset Input Threshold Voltage vs. VCC VIH - I/O Pin Read as “1”. 1.8 -40 °C 25 °C 85 °C 1.6 VTHRESHOLD [V] 1.4 1.2 1 0.8 0.6 0.4 0.2 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 Figure 35-31. Reset Input Threshold Voltage vs. VCC VIL - I/O Pin Read as “0”. 1.8 -40 °C 25 °C 85 °C 1.6 VTHRESHOLD [V] 1.4 1.2 1 0.8 0.6 0.4 0.2 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] 35.8 Bod Thresholds Figure 35-32. BOD Thresholds vs. Temperature BOD Level = 1.6V. 1.645 1.64 VBOT [V] 1.635 1.63 Rising Vcc 1.625 1.62 Falling Vcc 1.
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XMEGA A4 Figure 35-33. BOD Thresholds vs. Temperature BOD Level = 2.9V. 3.03 3.02 3.01 Rising Vcc VBOT [V] 3 2.99 2.98 2.97 2.96 Falling Vcc 2.95 2.94 2.93 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Temperature [°C] 35.9 Analog Comparator Figure 35-34. Analog Comparator Hysteresis vs. VCC High-speed, Small hysteresis. 20 85 °C 16 VHYST [mV] 25 °C -40 °C 12 8 4 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 Figure 35-35. Analog Comparator Hysteresis vs. VCC High-speed, Large hysteresis. 60 50 85 °C 25 °C -40 °C VHYST [mV] 40 30 20 10 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VCC [V] Figure 35-36. Analog Comparator Propagation Delay vs. VCC High-speed. 180 162 144 126 tPD [ns] 108 85 °C 25 °C -40 °C 90 72 54 36 18 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 35.10 Oscillators and Wake-up Time 35.10.1 Internal 32.768 kHz Oscillator Figure 35-37. Internal 32.768 kHz Oscillator Calibration Step Size T = -40 to 85C, VCC = 3V. 0.80 % Step size: f [kHz] 0.65 % 0.50 % 0.35 % 0.20 % 0.05 % 0 32 64 96 128 160 192 224 256 RC32KCAL[7..0] 35.10.2 Internal 2 MHz Oscillator Figure 35-38. Internal 2 MHz Oscillator CALA Calibration Step Size T = -40 to 85C, VCC = 3V. 0.50 % 0.40 % Step size: f [MHz] 0.30 % 0.20 % 0.10 % 0.00 % -0.10 % -0.
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XMEGA A4 Figure 35-39. Internal 2 MHz Oscillator CALB Calibration Step Size T = -40 to 85C, VCC = 3V. 3.00 % Step size: f [MHz] 2.50 % 2.00 % 1.50 % 1.00 % 0.50 % 0.00 % 0 8 16 24 32 40 48 56 64 112 128 DFLLRC2MCALB 35.10.3 Internal 32 MHZ Oscillator Figure 35-40. Internal 32 MHz Oscillator CALA Calibration Step Size T = -40 to 85C, VCC = 3V. 0.60 % 0.50 % Step size: f [MHz] 0.40 % 0.30 % 0.20 % 0.10 % 0.00 % -0.10 % -0.
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XMEGA A4 Figure 35-41. Internal 32 MHz Oscillator CALB Calibration Step Size T = -40 to 85C, VCC = 3V. 3.00 % Step size: f [MHz] 2.50 % 2.00 % 1.50 % 1.00 % 0.50 % 0.00 % 0 8 16 24 32 40 48 56 64 DFLLRC32MCALB 35.11 Module current consumption Figure 35-42. AC current consumption vs. Vcc Low-power Mode. Module current consumption [uA] 140 85 °C 25 °C -40 °C 120 100 80 60 40 20 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 Figure 35-43. Power-up current consumption vs. Vcc 25 °C 600 -40 °C 85 °C 500 ICC [uA] 400 300 200 100 0 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VCC [V] 35.12 Reset Pulsewidth Figure 35-44. Minimum Reset Pulse Width vs. Vcc 100 tRST [ns] 80 85 °C 25 °C -40 °C 60 40 20 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 35.13 PDI Speed Figure 35-45. PDI Speed vs. Vcc 35 25 °C 30 fMAX [MHz] 25 20 15 10 5 0 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.
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XMEGA A4 36. Errata 36.1 36.1.1 ATxmega16A4, ATxmega32A4 rev. A/B • • • • • • • • • • • • • • • • • • • • • • • • • • Bandgap voltage input for the ACs can not be changed when used for both ACs simultaneously VCC voltage scaler for AC is non-linear ADC has increased INL error for some operating conditions ADC gain stage output range is limited to 2.4 V ADC Event on compare match non-functional Bandgap measurement with the ADC is non-functional when VCC is below 2.
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XMEGA A4 Figure 36-1. Analog Comparator Voltage Scaler vs. Scalefac T = 25°C 3.5 3.3 V 3 2.7 V VSCALE [V] 2.5 2 1.8 V 1.5 1 0.5 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 SCALEFAC Problem fix/Workaround Use external voltage input for the analog comparator if accurate voltage levels are needed 3. ADC has increased INL error for some operating conditions Some ADC configurations or operating condition will result in increased INL error.
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XMEGA A4 Problem fix/Workaround Keep the amplified voltage output from the ADC gain stage below 2.4 V in order to get a correct result, or keep ADC voltage reference below 2.4 V. 5. ADC Event on compare match non-functional ADC signalling event will be given at every conversion complete even if Interrupt mode (INTMODE) is set to BELOW or ABOVE. Problem fix/Workaround Enable and use interrupt on compare match when using the compare function. 6.
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XMEGA A4 Problem fix/Workaround Do not set the BOD level higher than VCC even if the BOD is not used. 11. Sampled BOD in Active mode will cause noise when bandgap is used as reference Using the BOD in sampled mode when the device is running in Active or Idle mode will add noise on the bandgap reference for ADC, DAC and Analog Comparator. Problem fix/Workaround If the bandgap is used as reference for either the ADC, DAC or the Analog Comparator, the BOD must not be set in sampled mode. 12.
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XMEGA A4 For inverted I/O, configure the Analog Comparator to give an inverted result (i.e. connect positive input to the negative AC input and vice versa), or use and external inverter to change polarity of Analog Comparator output. 17. NMI Flag for Crystal Oscillator Failure automatically cleared NMI flag for Crystal Oscillator Failure (XOSCFDIF) will be automatically cleared when executing the NMI interrupt handler.
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XMEGA A4 23. Clearing TWI Stop Interrupt Flag may lock the bus If software clears the STOP Interrupt Flag (APIF) on the same Peripheral Clock cycle as the hardware sets this flag due to a new address received, CLKHOLD is not cleared and the SCL line is not released. This will lock the bus. Problem fix/Workaround Check if the bus state is IDLE. If this is the case, it is safe to clear APIF. If the bus state is not IDLE, wait for the SCL pin to be low before clearing APIF.
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XMEGA A4 37. Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revisions in this section are referring to the document revision. 37.1 37.2 37.3 37.4 8069R – 06/13 1. Not recommended for new designs - Use XMEGA A4U series. 1. Datasheet status changed to complete: Preliminary removed from the front page. 2. Updated all tables in the “Electrical Characteristics” . 3. Updated ”Packaging information” on page 58. 4.
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XMEGA A4 37.5 37.6 37.7 37.8 37.9 8069N – 02/10 1. Added ”PDI Speed” on page 92. 1. Updated the device pin-out Figure 2-1 on page 3. PDI_CLK and PDI_DATA renamed only PDI. 2. Updated ”Alternate Pin Functions Description” on page 49. 3. Updated ”Alternate Pin Functions” on page 51. 4. Updated ”Timer/Counter and AWEX functions” on page 49. 5. Added Table 34-18 on page 69. 6. Added Table 34-19 on page 69. 7. Changed Internal Oscillator Speed to ”Oscillators and Wake-up Time” on page 88.
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XMEGA A4 37.10 8069I – 03/09 1. Updated ”Electrical Characteristics” on page 61. 2. Updated ”Typical Characteristics” on page 70. 1. Updated ”Ordering Information” on page 2. 2. Added VFBGA to ”Pinout/Block Diagram” on page 3. 3. Updated ”Block Diagram” on page 6. 4. Updated feature list in ”Memories” on page 10. 5. Added 49-balls VFBGA to ”Packaging information” on page 58. 1. Updated ”Features” on page 1. 2. Updated ”Ordering Information” on page 2. 3.
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XMEGA A4 37.15 8069D – 08/08 1. Updated ”Features” on page 1 and ”Overview” on page 5. 2. Inserted ”Interrupt Vector Summary.” on page 52. 1. Updated Figure 2-1 on page 3 and ”Pinout and Pin Functions” on page 49. 2. Updated ”Overview” on page 5. 3. Updated XMEGA A4 Block Diagram, Figure 3-1 on page 6 by removing JTAG from the block diagram. 4. Removed the sections related to JTAG: JTAG Reset and JTAG Interface. 5. Updated Table 14-1 on page 25. 6.
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XMEGA A4 Table of Contents Features ..................................................................................................... 1 Typical Applications ................................................................................ 1 1 Ordering Information ............................................................................... 2 2 Pinout/Block Diagram .............................................................................. 3 3 Overview ...........................................
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XMEGA A4 10.2Overview ...............................................................................................................18 10.3Clock Options ........................................................................................................19 11 Power Management and Sleep Modes ................................................. 21 11.1Features ................................................................................................................21 11.2Overview ....................
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XMEGA A4 19 RTC - 16-bit Real-Time Counter ............................................................ 35 19.1Features ................................................................................................................35 19.2Overview ...............................................................................................................35 20 TWI - Two-Wire Interface ....................................................................... 36 20.1Features .................................
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XMEGA A4 29.1Features ................................................................................................................48 29.2Overview ...............................................................................................................48 29.3PDI - Program and Debug Interface ......................................................................48 30 Pinout and Pin Functions ...................................................................... 49 30.
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35.8Bod Thresholds .....................................................................................................85 35.9Analog Comparator ...............................................................................................86 35.10Oscillators and Wake-up Time ............................................................................88 35.11Module current consumption ...............................................................................90 35.12Reset Pulsewidth ....................
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Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Unit 1-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon Hong Kong Tel: (852) 2245-6100 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg.