Datasheet

26
8069R–AVR–06/2013
XMEGA A4
Not recommended for new designs -
Use XMEGA A4U series
0x040 NVM_INT_base Non-Volatile Memory Interrupt base
0x044 PORTB_INT_base Port B Interrupt base
0x056 PORTE_INT_base Port E Interrupt base
0x05A TWIE_INT_base Two-Wire Interface on Port E Interrupt base
0x05E TCE0_INT_base Timer/Counter 0 on port E Interrupt base
0x06A TCE1_INT_base Timer/Counter 1 on port E Interrupt base
0x074 USARTE0_INT_base USART 0 on port E Interrupt base
0x080 PORTD_INT_base Port D Interrupt base
0x084 PORTA_INT_base Port A Interrupt base
0x088 ACA_INT_base Analog Comparator on Port A Interrupt base
0x08E ADCA_INT_base Analog to Digital Converter on Port A Interrupt base
0x09A TCD0_INT_base Timer/Counter 0 on port D Interrupt base
0x0A6 TCD1_INT_base Timer/Counter 1 on port D Interrupt base
0x0AE SPID_INT_vector SPI on port D Interrupt vector
0x0B0 USARTD0_INT_base USART 0 on port D Interrupt base
0x0B6 USARTD1_INT_base USART 1 on port D Interrupt base
Table 14-1. Reset and Interrupt Vectors (Continued)
Program Address
(Base Address) Source Interrupt Description