Datasheet

102
8069Q–AVR–12/10
XMEGA A4
37.15 8069C – 06/08
37.16 8069B – 06/08
37.17 8069A – 02/08
1. Updated Figure 2-1 on page 3 and ”Pinout and Pin Functions” on page 49.
2. Updated ”Overview” on page 5.
3. Updated XMEGA A4 Block Diagram, Figure 3-1 on page 6 by removing JTAG from the block
diagram.
4. Removed the sections related to JTAG: JTAG Reset and JTAG Interface.
5. Updated Table 14-1 on page 25.
6. Updated all tables in section ”Alternate Pin Functions” on page 51.
1. Updated ”Features” on page 1.
2. Updated ”Pinout/Block Diagram” on page 3 and ”Pinout and Pin Functions” on page 49.
3. Updated ”Ordering Information” on page 2.
4. Updated ”Overview” on page 5, included the XMEGA A4 explanation text on page 6.
5. Added XMEGA A4 Block Diagram, Figure 3-1 on page 6.
6. Updated AVR CPU ”Features” on page 8 and Updated Figure 6-1 on page 8.
7. Updated Event System block diagram, Figure 9-1 on page 17.
8. Updated ”PMIC - Programmable Multi-level Interrupt Controller” on page 25.
9. Updated ”AC - Analog Comparator” on page 44.
10. Updated ”I/O configuration” on page 27.
11. Inserted a new Figure 16-1 on page 32.
12. Updated ”Peripheral Module Address Map” on page 53.
13. Inserted ”Instruction Set Summary” on page 54.
14. Added Speed grades in ”Speed” on page 63.
1. Initial revision.