Datasheet

49
8116J–AVR–06/2013
XMEGA A3B
Not recommended for new designs -
Use ATxmega256A3BU
29. Program and Debug Interfaces
29.1 Features
• PDI - Program and Debug Interface (Atmel proprietary 2-pin interface)
• JTAG Interface (IEEE std. 1149.1 compliant)
• Boundary-scan capabilities according to the IEEE Std. 1149.1 (JTAG)
• Access to the OCD system
• Programming of Flash, EEPROM, Fuses and Lock Bits
29.2 Overview
The programming and debug facilities are accessed through the JTAG and PDI physical inter-
faces. The PDI physical uses one dedicated pin together with the Reset pin, and no general
purpose pins are used. JTAG uses four general purpose pins on PORTB.
29.3 JTAG interface
The JTAG physical layer handles the basic low-level serial communication over four I/O lines
named TMS, TCK, TDI, and TDO. It complies to the IEEE Std. 1149.1 for test access port and
boundary scan.
29.4 PDI - Program and Debug Interface
The PDI is an Atmel proprietary protocol for communication between the microcontroller and
Atmel’s development tools.