Datasheet

8116J–AVR–06/2013

XMEGA A3B

Not recommended for new designs -

Use ATxmega256A3BU

26. DAC - 12-bit Digital to Analog Converter

26.1 Features

• One DAC with 12-bit resolution

• Up to 1 Msps conversion rate for each DAC

• Flexible conversion range

• Multiple trigger sources

• 1 continuous output or 2 Sample and Hold (S/H) outputs for each DAC

• Built-in offset and gain calibration

• High drive capabilities

• Low Power Mode

26.2 Overview

The XMEGA A3B devices features one two-channel, 12-bit, 1 Msps DACs with built-in offset and

gain calibration, see Figure 26-1 on page 44.

A DAC converts a digital value into an analog signal. The DAC may use an internal 1.0 voltage

as the upper limit for conversion, but it is also possible to use the supply voltage or any applied

voltage in-between. The external reference input is shared with the ADC reference input.

Figure 26-1. DAC overview

The DAC has one continuous output with high drive capabilities for both resistive and capacitive

loads. It is also possible to split the continuous time channel into two Sample and Hold (S/H)

channels, each with separate data conversion registers.

A DAC conversion may be started from the application software by writing the data conversion

registers. The DAC can also be configured to do conversions triggered by the Event System to

have regular timing, independent of the application software. DMA may be used for transferring

data from memory locations to DAC data registers.

The DAC has a built-in calibration system to reduce offset and gain error when loading with a

calibration value from software.

PORTB has one DAC. Notation of this is DACB.

DAC

Channel A

Channel B

Event

Trigger

Configuration

Reference selection

Channel A

Channel B