Datasheet

10
8116J–AVR–06/2013
XMEGA A3B
Not recommended for new designs -
Use ATxmega256A3BU
7.3 In-System Programmable Flash Program Memory
The XMEGA A3B devices contain On-chip In-System Programmable Flash memory for program
storage, see Figure 7-1 on page 10. Since all AVR instructions are 16- or 32-bits wide, each
Flash address location is 16 bits.
The Program Flash memory space is divided into Application and Boot sections. Both sections
have dedicated Lock Bits for setting restrictions on write or read/write operations. The Store Pro-
gram Memory (SPM) instruction must reside in the Boot Section when used to write to the Flash
memory.
A third section inside the Application section is referred to as the Application Table section which
has separate Lock bits for storage of write or read/write protection. The Application Table sec-
tion can be used for storing non-volatile data or application software.
The Application Table Section and Boot Section can also be used for general application
software.
7.4 Data Memory
The Data Memory consists of the I/O Memory, EEPROM and SRAM memories, all within one
linear address space, see Figure 7-2 on page 10. To simplify development, the memory map for
all devices in the family is identical and with empty, reserved memory space for smaller devices.
Figure 7-1. Flash Program Memory (Hexadecimal address)
Word Address
0
Application Section
(256 KB)
...
1EFFF
1F000
Application Table Section
(8 KB)
1FFFF
20000
Boot Section
(8 KB)
20FFF
Figure 7-2. Data Memory Map (Hexadecimal address)
Byte Address ATxmega256A3B
0
I/O Registers
(4 KB)
FFF