Datasheet
3
8068U–AVR–06/2013
XMEGA A3
Not recommended for new designs -
Use XMEGA A3U series
2. Pinout/Block Diagram
Figure 2-1. Block diagram and pinout.
Notes: 1. For full details on pinout and alternate pin functions refer to ”Pinout and Pin Functions” on page 49.
2. The large center pad underneath the QFN/MLF package should be soldered to ground on the board to ensure good
mechanical stability.
INDEX CORNER
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PF2
PF1
PF0
VCC
GND
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
VCC
GND
PD7
PA 3
PA 4
PA 5
PA 6
PA 7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
GND
VCC
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
GND
VCC
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PA 2
PA 1
PA 0
AVCC
GND
PR1
PR0
RESET/PDI
PDI
PF7
PF6
VCC
GND
PF5
PF4
PF3
FLASH
RAM
E
2
PROM
DMA
Interrupt Controller
OCD
ADC A
ADC B
DAC B
AC A0
AC A1
AC B0
AC B1
Port
A
Port
B
Event System ctrl
Port R
Power
Control
Reset
Control
Watchdog
OSC/CLK
Control
BOD POR
RTC
EVENT ROUTING NETWORK
DATA BU S
DATA BU S
VREF
TEMP
Port C Port D Port E Port F
CPU
T/C0:1
USART0:1
SPI
TWI
T/C0:1
USART0:1
SPI
T/C0:1
USART0:1
SPI
TWI
T/C0
USART0