Datasheet

423
XMEGA D3 [DATASHEET]
Atmel-8134N-ATxmega32D3-64D3-128D3-192D3-256D3-384D3_datasheet–03/2014
35.11 8134D – 11/2009
35.12 8134C – 10/2009
35.13 8134B – 08/2009
4. Updated “Alternate pin function description” on page 49.
5. Updated “Alternate pin functions” on page 50.
6. Updated “Timer/counter and AWEX functions” on page 49.
7. Added Table 31-17 on page 68.
8. Added Table 31-18 on page 69.
9. Changed internal oscillator speed to “Power-on reset current consumption vs. VCC. BOD level = 3.0V, enabled in
continuous mode.” on page 108
10. Updated “Errata” on page 356.
1. Added Table 31-3 on page 64, Endurance and data retention
2. Updated Table 31-10 on page 67, Input hysteresis is in V and not in mV.
3. Added “Errata” on page 356
4. Editing updates.
1. Updated “Features” on page 1 with two-wire interfaces.
2. Updated “Pinout/block diagram” on page 4.
3. Updated “Overview” on page 5.
4. Updated “XMEGA D# block diagram” on page 5.
5. Updated Table 13-1 on page 28.
6. Updated “Overview” on page 38.
7. Updated Table 28-5 on page 53.
8. Updated “Peripheral module address map” on page 54.
1. Added The maximum CPU clock frequency depends on VCC. As shown in Figure 32-8 on page 83 the frequency vs.
VCC curve is linear between 1.8V < VCC < 2.7V. on page 64.
2. Added “Typical characteristics” on page 178.