Datasheet

79XMEGA E5 [DATASHEET]
Atmel-8153H–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–07/2014
Notes: 1. Maximum numbers are based on characterisation and not tested in production, and valid for 10% to 90% input voltage range.
2. Unless otherwise noted all linearity, offset and gain error numbers are valid under the condition that external VREF is used.
Table 36-10. Gain stage characteristics.
DNL
(1)
Differential non-linearity
Differential mode
16kSPS, VREF = 3V 1
lsb
16kSPS, VREF = 1V 2
300kSPS, VREF = 3V 1
300kSPS, VREF = 1V 2
Single ended
unsigned mode
16kSPS, VREF = 3.0V 1 1.5
16kSPS, VREF = 1.0V 2 3
Offset Error Differential mode
8 mV
Temperature drift 0.01 mV/K
Operating voltage drift 0.25 mV/V
Gain Error Differential mode
External reference -5
mV
AVCC/1.6 -5
AVCC/2.0 -6
Bandgap ±10
Temperature drift 0.02 mV/K
Operating voltage drift 2 mV/V
Gain Error
Single ended
unsigned mode
External reference -8
mV
AVCC/1.6 -8
AVCC/2.0 -8
Bandgap ±10
Temperature drift 0.03 mV/K
Operating voltage drift 2 mV/V
Symbol Parameter Condition
(2)
Min. Typ. Max. Units
Symbol Parameter Condition Min. Typ. Max. Units
R
in
Input resistance Switched 4.0 kΩ
C
sample
Input capacitance Switched 4.4 pF
Signal range Gain stage output 0 AV
CC
- 0.6 V
Propagation delay ADC conversion rate 1/2 1 3
Clk
ADC
cycles
Clock rate Same as ADC 100 1800 kHz