Datasheet

45XMEGA E5 [DATASHEET]

Atmel-8153H–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–07/2014

24. USART

24.1 Features

z Two identical USART peripherals

z Full-duplex or one-wire half-duplex operation

z Asynchronous or synchronous operation

z Synchronous clock rates up to 1/2 of the device clock frequency

z Asynchronous clock rates up to 1/8 of the device clock frequency

z Supports serial frames with:

z 5, 6, 7, 8, or 9 data bits

z Optionally even and odd parity bits

z 1 or 2 stop bits

z Fractional baud rate generator

z Can generate desired baud rate from any system clock frequency

z No need for external oscillator with certain frequencies

z Built-in error detection and correction schemes

z Odd or even parity generation and parity check

z Data overrun and framing error detection

z Noise filtering includes false start bit detection and digital low-pass filter

z Separate interrupts for

z Transmit complete

z Transmit data register empty

z Receive complete

z Multiprocessor communication mode

z Addressing scheme to address a specific devices on a multidevice bus

z Enable unaddressed devices to automatically ignore all frames

z System wake-up from Start bit

z Master SPI mode

z Double buffered operation

z Configurable data order

z Operation up to 1/2 of the peripheral clock frequency

z IRCOM module for IrDA compliant pulse modulation/demodulation

z One USART is connected to XMEGA Custom Logic (XCL) module:

z Extend serial frame length up to 256 bit by using the peripheral counter

z Modulate/demodulate data within the frame by using the glue logic outputs

24.2 Overview

The universal synchronous and asynchronous serial receiver and transmitter (USART) is a fast and flexible serial

communication module. The USART supports full-duplex with asynchronous and synchronous operation and single wire

half-duplex communication with asynchronous operation. The USART can be configured to operate in SPI master mode

and used for SPI communication.

Communication is frame based, and the frame format can be customized to support a wide range of standards. The

USART is buffered in both directions, enabling continued data transmission without any delay between frames. Separate

interrupts for receive and transmit complete enable fully interrupt driven communication. Frame error and buffer overflow

are detected in hardware and indicated with separate status flags. Even or odd parity generation and parity check can

also be enabled.