Datasheet

XMEGA A4U [DATASHEET]
Atmel-8387G-AVR-ATxmega16A4U-34A4U-64A4U-128A4U-Datasheet_03/2014
110
36.2.15 SPI Characteristics
Figure 36-12. SPI timing requirements in master mode.
Figure 36-13. SPI timing requirements in slave mode.
MSB LSB
MSB LSB
t
MOS
t
MIS
t
MIH
t
SCKW
t
SCK
t
MOH
t
MOH
t
SCKF
t
SCKR
t
SCKW
MOSI
(Data output)
MISO
(Data input)
SCK
(CPOL = 1)
SCK
(CPOL = 0)
SS
MSB LSB
MSB LSB
t
SIS
t
SIH
t
SSCKW
t
SSCKW
t
SSCK
t
SSH
t
SOSSH
t
SCKR
t
SCKF
t
SOS
t
SSS
t
SOSSS
MISO
(Data output)
MOSI
(Data input)
SCK
(CPOL = 1)
SCK
(CPOL = 0)
SS