Datasheet

XMEGA A4U [DATASHEET]
Atmel-8387G-AVR-ATxmega16A4U-34A4U-64A4U-128A4U-Datasheet_03/2014
334
39. Datasheet Revision History
Please note that the referring page numbers in this section are referred to this document. The referring revision in this
section are referring to the document revision.
39.1 8387G – 03/2014
39.2 8387F – 01/2014
39.3 8387E – 11/2013
39.4 8387D – 02/2013
1. Removed “Preliminary” from the datasheet
2. Updated “Errata” on page 329: added ERRATA “Rev. D” and “Rev. C” for “ATxmega64A4U” on page 331
1. Removed JTAG references from the datasheet
2. Updated Figure 30-1 on page 53. The positive Mux has two “Input” while the negative Mux has four “Input”
1.
Updated Flash size column in “Ordering Information” on page 2 for:
ATxmega128A4U-AU, ATxmega128A4U-AUR, ATxmega128A4U-MH and ATxmega128A4U-MHR
1. Updated typos in “Ordering Information” on page 2.
2. Updated PE2 and PE3 pins in “Pinout/Block Diagram” on page 3 to indicate that these can be used as TOSC pins.
3. Renamed pin 19 from VDD to VCC in Figure 2-1 on page 3.
4. Updated page size for ATxmega128A4U in Table 7-1 on page 16.
5. Added column for TWI using external driver interface in Table 32-3 on page 58.
6. Updated ATxmega16A4U leakage current in Table 36-7 on page 76.
7. Added application erase time for ATxmega16A4U in Table 36-21 on page 83.
8.
Updated limits for VIH and VIL:
ATxmega16A4U: Table 36-7 on page 76
ATxmega32A4U: Table 36-39 on page 97
ATxmega64A4U: Table 36-71 on page 119
ATxmega128A4U:Table 36-103 on page 141
9.
Updated DAC clock and timing characteristics:
ATxmega16A4U: Table 36-13 on page 80
ATxmega32A4U: Table 36-45 on page 100
ATxmega64A4U: Table 36-77 on page 122
ATxmega128A4U: Table 36-109 on page 144.
10. Updated ATxmega16A4U “ External clock characteristics” on page 85.