Datasheet
3
XMEGA C3 [DATASHEET]
8492F–AVR–07/2013
2. Pinout/Block Diagram
Figure 2-1. Block diagram and pinout.
Notes: 1. For full details on pinout and alternate pin functions refer to “Pinout and Pin Functions” on page 49.
2. The large center pad underneath the QFN/MLF package should be soldered to ground on the board to ensure good mechanical stability.
1
2
3
4
64
63
62
61
60
59
58
VCC
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
57
56
55
54
53
52
51
50
49
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
GND
GND
VCC
AVCC
GND
PB0
PB1
PB3
PB2
PB7
PB5
PB4
PB6
PA7
PA6
PA0
PA1
PA2
PA3
PA4
PA5
PDI
PR0
PR1
VCC
GND
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
VCC
GND
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
VCC
GND
Power
Supervision
Port A
EVENT ROUTING NETWORK
SRAM
FLASH
ADC
AC0:1
OCD
Port EPort D
Prog/Debug
Interface
EEPROM
Port C
TC0:1
Event System
Controller
Watchdog
Timer
Internal
oscillators
OSC/CLK
Control
Real Time
Counter
Interrupt
Controller
DATA BUS
DATA BUS
Port R
USART0
TWI
SPI
TC0
USART0
SPI
TC0
USART0
TWI
Port B
AREF
AREF
Sleep
Controller
Reset
Controller
Internal
references
IRCOM
Port F
TC0
USART0
CPU
XOSC
TOSC
CRC
Watchdog
oscillator
BUS
matrix
USB
RESET/PDI
Digital function
Analog function / Oscillators
Programming, debug, test
External clock / Crystal pins
General Purpose I /O
Ground
Power