Datasheet

57
XMEGA B3 [DATASHEET]
8074D–AVR–08/2013
32.2 Alternate Pin Functions
The tables below show the primary/default function for each pin on a port in the first column, the pin number in the
second column, and then all alternate pin functions in the remaining columns. The head row shows what peripheral that
enable and use the alternate pin functions.
For better flexibility, some alternate functions also have selectable pin locations for their functions, this is noted under the
first table where this apply.
Table 32-1. Port B - Alternate functions
Table 32-2. Port C - Alternate functions.
Notes: 1. Pin mapping of all TC0 can optionally be moved to high nibble of port.
2. Pin mapping of all USART0 can optionally be moved to high nibble of port.
3. Pins MOSI and SCK for all SPI can optionally be swapped.
4. CLKOUT can optionally be moved between port C and E and between pin 4 and 7.
5. EVOUT can optionally be moved between port C and E and between pin 4 and 7.
PORT B PIN # INTERRUPT
ADCA
POS/GAIN
POS
ADCB
POS/GAIN
POS
ADCB
NEG
ADCB
GAINNEG
ACB
POS
ACB
NEG
ACB
OUT
REFB JTAG
AGND 55
AVDD 56
PB0 57 SYNC ADC8 ADC0 ADC0 AC0 AC0 AREF
PB1 58 SYNC ADC9 ADC1 ADC1 AC1 AC1
PB2 59 SYNC/ASYNC ADC10 ADC2 ADC2 AC2
PB3 60 SYNC ADC11 ADC3 ADC3 AC3 AC3
PB4 61 SYNC ADC12 ADC4 ADC4 AC4 TMS
PB5 62 SYNC ADC13 ADC5 ADC5 AC5 AC5 TDI
PB6 64 SYNC ADC14 ADC6 ADC6 AC6 AC1OUT TCK
PB7 64 SYNC ADC15 ADC7 ADC7 AC7 AC0OUT TDO
PORT C
PIN
#
INTERRUPT TCC0
(1)
AWEXC TCC1 USARTC0
(2)
SPIC
(3)
TWIC EXTCLK
CLOCKOUT
(4)
EVENTOUT
(5)
PC0 1 SYNC OC0A OC0ALS SDA EXTCLKC0
PC1 2 SYNC OC0B OC0AHS XCK0 SCL EXTCLKC1
PC2 3 SYNC/ASYNC OC0C OC0BLS RXD0 EXTCLKC2
PC3 4 SYNC OC0D OC0BHS TXD0 EXTCLKC3
PC4 5 SYNC OC0CLS OC1A SS EXTCLKC4
PC5 6 SYNC OC0CHS OC1B MOSI EXTCLKC5
PC6 7 SYNC OC0DLS MISO EXTCLKC6 RTCOUT
PC7 8 SYNC OC0DHS SCK EXTCLKC7 clk
PER
EVOUT