Datasheet

95
XMEGA B [DATASHEET]
8291B–AVR–01/2013
7.11.4 COMP1 – Compare register byte 1
The COMP1 and COMP2 register pair represent the frequency ratio between the oscillator and the reference clock. The
initial value for these registers is the ratio between the internal oscillator frequency and a 1.024kHz reference.
 Bit 7:0 – COMP1[7:0]: Compare register byte 1
These bits hold byte 1 of the 16-bit compare register.
7.11.5 COMP2 – Compare register byte 2
 Bit 7:0 – COMP2[15:8]: Compare Register Byte 2
These bits hold byte 2 of the 16-bit compare register.
Table 7-11. Nominal DFLL32M COMP values for different output frequencies.
Bit 76543210
+0x05 COMP[7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 00000000
Bit 76543210
+0x06 COMP[15:8]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 00000000
Oscillator frequency (MHz) COMP value (Clk
RCnCREF
= 1.024kHz)
30.0 0x7270
32.0 0x7A12
34.0 0x81B3
36.0 0x8954
38.0 0x90F5
40.0 0x9896
42.0 0xA037
44.0 0xA7D8
46.0 0xAF79
48.0 0xB71B
50.0 0xBEBC
52.0 0xC65D
54.0 0xCDFE