Datasheet

87
XMEGA B [DATASHEET]
8291B–AVR–01/2013
7.9.3 LOCK – Lock register
 Bit 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.
 Bit 0 – LOCK: Clock System Lock
When this bit is written to one, the CTRL and PSCTRL registers cannot be changed, and the system clock selection and
prescaler settings are protected against all further updates until after the next reset. This bit is protected by the
configuration change protection mechanism. For details, refer to “Configuration Change Protection” on page 14.
The LOCK bit can be cleared only by a reset.
7.9.4 RTCCTRL – RTC Control register
 Bit 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.
 Bit 3:1 – RTCSRC[2:0]: RTC and LCD Clock Source
These bits select the clock source for the Real-Time Counter (RTC) and LCD according to Table 7-4.
Table 7-4. RTC clock source selection.
Note: 1. The LCD will always use the non-prescaled 32kHz oscillator output as clock source.
Bit 76543210
+0x02
– – – – – – – LOCK
Read/Write RRRRRRRR/W
Initial Value 0 0 0 00000
Bit 7 6 5 4 3 2 1 0
+0x03
– – – – RTCSRC[2:0] RTCEN
Read/Write R R R R R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
RTCSRC[2:0] Group Configuration Description
000 ULP 1kHz from 32kHz internal ULP oscillator
(1)
001 TOSC 1.024kHz from 32.768kHz crystal oscillator on TOSC
(1)
010 RCOSC 1.024kHz from 32.768kHz internal oscillator
(1)
011 — Reserved
100 — Reserved
101 TOSC32 32.768kHz from 32.768kHz crystal oscillator on TOSC
110 RCOSC32 32.768kHz from 32.768kHz internal oscillator
111 EXTCLK External clock from TOSC1