Datasheet

48
XMEGA B [DATASHEET]
8291B–AVR–01/2013
4.22 Register Summary - General Purpose I/O Registers
4.23 Register Summary - MCU Control
4.24 Interrupt Vector Summary - NVM Controller
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
+0x00
GPIOR0 GPIOR[7:0]
42
+0x01
GPIOR1 GPIOR[7:0]
42
+0x02
GPIOR2 GPIOR[7:0]
42
+0x03
GPIOR3 GPIOR[7:0]
42
+0x04
Reserved
+0x05
Reserved
+0x06
Reserved
+0x07
Reserved
+0x08
Reserved
+0x09
Reserved
+0x0A
Reserved
+0x0B
Reserved
+0x0C
Reserved
+0x0D
Reserved
+0x0E
Reserved
+0x0F
Reserved
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
+0x00
DEVID0 DEVID0[7:0]
42
+0x01
DEVID1 DEVID1[7:0]
42
+0x02
DEVID2 DEVID2[7:0]
43
+0x03
REVID
REVID[3:0]
43
+0x04
JTAGUID JTAGUID[7:0]
43
+0x05
Reserved
+0x06
MCUCR
JTAGD
43
+0x07
ANAINIT
STARTUPDLYB[1:0] STARTUPDLYA[1:0] 44
+0x08
EVSYSLOCK
EVSYS0LOC 44
+0x09
AWEXLOCK
AWEXCLOCK 45
+0x0A
Reserved
+0x0B
Reserved
Offset Source Interrupt Description
0x00 EE_vect Nonvolatile memory EEPROM interrupt vector
0x02 SPM_vect Nonvolatile memory SPM interrupt vector