Datasheet

378
XMEGA B [DATASHEET]
8291B–AVR–01/2013
programming. For more details, refer to “Register Description” on page 395.
30.4 NVM Commands
The NVM controller has a set of commands used to perform tasks on the NVM. This is done by writing the selected
command to the NVM command register. In addition, data and addresses must be read/written from/to the NVM data and
address registers for memory read/write operations.
When a selected command is loaded and address and data are set up for the operation, each command has a trigger
that will start the operation. Based on these triggers, there are three main types of commands.
30.4.1 Action-triggered Commands
Action-triggered commands are triggered when the command execute (CMDEX) bit in the NVM control register A
(CTRLA) is written. Action-triggered commands typically are used for operations which do not read or write the NVM,
such as the CRC check.
30.4.2 NVM Read-triggered Commands
NVM read-triggered commands are triggered when the NVM is read, and this is typically used for NVM read operations.
30.4.3 NVM Write-triggered Commands
NVM write-triggered commands are triggered when the NVM is written, and this is typically used for NVM write
operations.
30.4.4 Write/Execute Protection
Most command triggers are protected from accidental modification/execution during self-programming. This is done
using the configuration change protection (CCP) feature, which requires a special write or execute sequence in order to
change a bit or execute an instruction. For details on the CCP, refer to “Configuration Change Protection” on page 13.
30.5 NVM Controller Busy Status
When the NVM controller is busy performing an operation, the busy flag in the NVM status register is set and the
following registers are blocked for write access:
 NVM command register
 NVM control A register
 NVM control B register
 NVM address registers
 NVM data registers
This ensures that the given command is executed and the operations finished before the start of a new operation. The
external programmer or application software must ensure that the NVM is not addressed when it is busy with a
programming operation.
Programming any part of the NVM will automatically block:
 All programming to other parts of the NVM
 All loading/erasing of the flash and EEPROM page buffers
 All NVM reads from external programmers
 All NVM reads from the application section
During self-programming, interrupts must be disabled or the interrupt vector table must be moved to the boot loader
sections, as described in “Interrupts and Programmable Multilevel Interrupt Controller” on page 135.