Datasheet

337
XMEGA B [DATASHEET]
8291B–AVR–01/2013
 Bit 4 – CONVMODE: Conversion Mode
This bit controls whether the ADC will work in signed or unsigned mode. By default, this bit is cleared and the ADC is
configured for unsigned mode. When this bit is set, the ADC is configured for signed mode.
 Bit 3 – FREERUN: Free Running Mode
This bit controls the free running mode for the ADC. Once a conversion is finished, the next input will be sampled and
converted.
 Bit 2:1 – RESOLUTION[1:0]: Conversion Result Resolution
These bits define whether the ADC completes the conversion at 12- or 8-bit result resolution. They also define whether
the 12-bit result is left or right adjusted within the 16-bit result registers. See Table 26-2 for possible settings.
Table 26-2. ADC conversion result resolution.
 Bit 0 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this
register is written.
26.15.3 REFCTRL – Reference Control register
 Bit 7 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this
register is written.
 Bits 6:4 – REFSEL[2:0]: Reference Selection
These bits selects the reference for the ADC according to Table 26-3.
Table 26-3. ADC reference selection.
RESOLUTION[1:0] Group Configuration Description
00 12BIT 12-bit result, right adjusted
01 – Reserved
10 8BIT 8-bit result, right adjusted
11 LEFT12BIT 12-bit result, left adjusted
Bit 7 6 5 4 3 2 1 0
+0x02
– REFSEL[2:0] – – BANDGAP TEMPREF
Read/Write R R/W R/W R/W R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0
REFSEL[2:0] Group Configuration Description
000 INT1V 10/11 of bandgap (1.0V)
001 INTVCC V
CC
/1.6
010 AREFA External reference from AREF pin on PORT A
011 AREFB External reference from AREF pin on PORT B
100 INTVCC2 V
CC
/2
101 - 111 – Reserved