Datasheet

310
XMEGA B [DATASHEET]
8291B–AVR–01/2013
Table 25-3. LCD power supply pins behavior.
Notes: 1. ENABLE and XBIAS bits of the CTRLA register.
Figure 25-9. LCD Power Supply Block Diagram
Different application schemes for bias generation are shown in Figure 25-10 on page 310.
Figure 25-10.Analog Connections vs. Internal or External Bias Generation
ENABLE
(1)
XBIAS
(1)
VLCD (pin) BIAS2 BIAS1 CAPH / CAPL
0 x H.Z. H.Z. H.Z. H.Z.
1
0 V
LCD
2
/
3
V
LCD
(also in static mode)
1
/
3
V
LCD
(also in static mode)
Pump voltage
1 Input for V
LCD
- Input for BIAS2
- H.Z. if static bias
- Input for BIAS1
- H.Z. if static bias
H.Z.
BIAS1
BIAS2
VLCD
CAPL
CAPH
COMy
SEGx
XBIAS
x3
x2
x1
BANDGAP
Reference
Pump
Contrast
100 nF
100 nF
(1)
Internal Generation
Static or 1/3 Bias
ATxmegaB Device
CAPH
CAPL
VCC
VLCD
BIAS2
BIAS1
GND
VCC
100 nF
(1)
100 nF
(1)
100 nF
(1)
ATxmegaB Device
CAPH
CAPL
VCC
VLCD
BIAS2
BIAS1
GND
External Generation
Static
VCC ATxmegaB Device VCC
External Generation (example)
1/3 Bias
Notes :
1: These values are provided for design guidance only. They should be optimized for the application by the designer based on actual LCD specifications.
2: Bias generation can be provided by other sources of voltage than a division resistor.
Ext.V LCD
(2)
(2)
(2)
(2)
Decoupling
Decoupling
capacitors
capacitors
Decoupling
Decoupling
capacitor
capacitor
Ext.V LCD
CAPH
CAPL
VCC
VLCD
BIAS2
BIAS1
GND