Datasheet
304
XMEGA B [DATASHEET]
8291B–AVR–01/2013
25.2.1 Definitions
Several terms are used when describing LCD. The definitions in Table 25-1 are used throughout this document.
Table 25-1. LCD definitions.
Figure 25-1. LCD Typical Connections
25.2.2 LCD Clock Sources
The LCD controller can be clocked by an internal or an external asynchronous 32kHz clock source. This 32kHz oscillator
source selection is the same as for the Real Time Counter, RTCSRC bit-field in RTC control register (see Table 7-4 on
page 87).
The clock source must be stable to obtain accurate LCD timing and hence minimize DC voltage offset across LCD
segments.
25.2.3 LCD Prescaler
The prescaler consists of a 3-bit ripple counter and a 1 to 8-clock divider (see Figure 25-2 on page 305). The PRESC bit
selects clk
LCD
divided by 8 or 16 from the ripple counter.
If a finer resolution in frame rate is required, the CLKDIV bit-field can be used to divide the clock further by 1 to 8.
Output from the clock divider
clk
LCD_PS
is used as clock source for the LCD timing.
25.2.4 LCD Display Memory
The Display Memory is available through I/O registers grouped for each common terminal.
A start of new frame triggers an update of the Shadow Display Memory. The content of Display Memory is saved into the
Shadow Display Memory. A Display Memory refresh is possible without affecting data that is sent to the panel.
LCD A passive display panel with terminals leading directly to a segment
Segment (or pixel) A LCD panel active area within the display which can be turned “ON or “OFF”. This can be a single
segment of a 7-segment character or a specific symbol (icon).
COM Common terminal
SEG Segment terminal
1 / Duty 1 / Number of common terminals on an actual LCD display
1 / Bias 1 / Number of voltage levels used driving a LCD display -1
Frame Rate Number of times the LCD segments are energized per second
Segment 1
Segment 0
Segment 2
Segment 6
Segment 5
Segment 4
SEG0
Segment 3
Segment 7
Common
Terminal 0
COM0
Common
Terminal 1
COM1
Segment
Terminal 0
SEG1
Segment
Terminal 1
SEG2
Segment
Terminal 2
SEG3
Segment
Terminal 3