Datasheet

282
XMEGA B [DATASHEET]
8291B–AVR–01/2013
Table 21-7. CMODE bit settings.
Notes: 1. See “IRCOM - IR Communication Module” on page 285 for full description on using IRCOM mode.
2. See “USART in Master SPI Mode” on page 276 for full description of the master SPI operation.
 Bits 5:4 – PMODE[1:0]: Parity Mode
These bits enable and set the type of parity generation according to Table 21-8. When enabled, the transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The receiver will generate a
parity value for the incoming data and compare it to the PMODE setting, and if a mismatch is detected, the PERR flag in
STATUS will be set.
These bits are unused in master SPI mode operation.
Table 21-8. PMODE bit settings.
 Bit 3 – SBMODE: Stop Bit Mode
This bit selects the number of stop bits to be inserted by the transmitter according to Table 21-9. The receiver ignores
this setting.
This bit is unused in master SPI mode operation.
Table 21-9. SBODE bit settings.
 Bit 2:0 – CHSIZE[2:0]: Character Size
The CHSIZE[2:0] bits set the number of data bits in a frame according to Table 21-10 on page 283. The receiver and
transmitter use the same setting.
CMODE[1:0] Group Configuration Mode
00 ASYNCHRONOUS Asynchronous USART
01 SYNCHRONOUS Synchronous USART
10 IRCOM IRCOM
(1)
11 MSPI Master SPI
(2)
PMODE[1:0] Group Configuration Parity Mode
00 DISABLED Disabled
01 Reserved
10 EVEN Enabled, even parity
11 ODD Enabled, odd parity
SBMODE Stop Bit(s)
0 1
1 2