Datasheet

26
XMEGA B [DATASHEET]
8291B–AVR–01/2013
4.14 Register Description – NVM Controller
4.14.1 ADDR0 – Address register 0
The ADDR0, ADDR1, and ADDR2 registers represent the 24-bit value, ADDR. This is used for addressing all NVM
sections for read, write, and CRC operations.
 Bit 7:0 – ADDR[7:0]: Register Byte 0
This register gives the address low byte when accessing NVM locations.
4.14.2 ADDR1 – Address register 1
 Bit 7:0 – ADDR[15:8]: Address Register Byte 1
This register gives the address high byte when accessing NVM locations.
4.14.3 ADDR2 – Address register 2
 Bit 7:0 – ADDR[23:16]: Address Register Byte 2
This register gives the address extended byte when accessing NVM locations.
4.14.4 DATA0 – Data register 0
The DATA0, DATA1, and DATA registers represent the 24-bit value, DATA. This holds data during NVM read, write, and
CRC access.
 Bit 7:0 – DATA[7:0]: Data Register Byte 0
This register gives the data value byte 0 when accessing NVM locations.
Bit 76543210
+0x00 ADDR[7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x01 ADDR[15:8]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x02 ADDR[23:16]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x04 DATA[7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0