Datasheet

230
XMEGA B [DATASHEET]
8291B–AVR–01/2013
Bit 2 – STALL: Endpoint STALL
This bit controls the STALL behavior if the endpoint.
Bit 1:0 – BUFSIZE[1:0]: Data Size
These bits configure the maximum data payload size for the endpoint. Incoming data bytes exceeding the maximum data
payload size are discarded.
Bit 2:0 – BUFSIZE[2:0]: Data Size
These bits configure the maximum data payload size for the endpoint when configured for isochronous operation.
Table 18-5. BUFSIZE configuration
Note: 1. Setting only available for isochronous endpoints.
18.14.3 CNTL – Counter Low register
The CNTL and CNTH registers represent the 10-bit value, CNT, that contains the number of bytes received in the last
OUT or SETUP transaction for an OUT endpoint, or the number of bytes to be sent in the next IN transaction for an IN
endpoint.
Bit 7:0 – CNT[7:0]: Endpoint Byte Counter
This byte contains the eight lsbs of the USB endpoint counter (CNT).
BUFSIZE[2:0] Group Configuration Description
000 8 8-byte buffer size
001 16 16-byte buffer size
010 32 32-byte buffer size
011 64 64-byte buffer size
100
(1)
128 128-byte buffer size
101
(1)
256 256-byte buffer size
110
(1)
512 512-byte buffer size
111
(1)
1023 1023-bytesbuffer size
Bit 76543210
+0x02 CNT[7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value XXXXXXXX